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authorTom de Vries <tdevries@suse.de>2025-08-26 21:38:22 +0200
committerTom de Vries <tdevries@suse.de>2025-08-26 21:38:22 +0200
commite3a6f62033cd3a1acdafc34d8bf7e22e532dff9b (patch)
treeabe17f4f3eeff3e1cdc0202b41a1210ec4cdc652 /r
parent0a507079473c5a48be7affbc790c304ecb5ada3e (diff)
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[gdb/tdep] Add XOP support in amd64_get_insn_details
Implement support for XOP instructions [1] in amd64_get_insn_details. The encoding scheme is documented here [2]. Essentially it's a variant of the VEX3 encoding scheme, with: - 0x8f as the first byte instead of 0xc4, and - an opcode map >= 8. The changes are roughly the same as the XOP part of an earlier submission [3], hence the tag. The only real difference is that that patch proposed to implement xop_prefix_p using: ... return pfx[0] == 0x8f && (pfx[1] & 0x38); ... which tries to resolve the conflict between the XOP prefix (starts with 0x8f) and the POP instruction (opcode 0x8f) by detecting that it's not a POP instruction. Instead, use the way AMD has resolved this conflict in the specification, by checking for opcode map >= 8: ... gdb_byte m = pfx[1] & 0x1f; return pfx[0] == 0x8f && m >= 8; ... Tested on x86_64-linux. Co-Authored-By: Jan Beulich <jbeulich@suse.com> Reviewed-By: Klaus Gerlicher<klaus.gerlicher.@intel.com> [1] https://en.wikipedia.org/wiki/XOP_instruction_set [2] https://www.amd.com/content/dam/amd/en/documents/archived-tech-docs/programmer-references/43479.pdf [3] https://sourceware.org/pipermail/gdb-patches/2019-February/155347.html
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