bfd:

	Add ms2.
	* archures.c (bfd_mach_ms2): Define.
	* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
	* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
	(ms1_elf_merge_private_bfd_data): Remove unused variables.  Add
	correct merging logic, with workaround.
	(ms1_elf_print_private_bfd_data): Add ms2 case.
	* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.

cpu:
	Add ms2
	* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
	model.
	(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
	f-cb2incr, f-rc3): New fields.
	(LOOP): New instruction.
	(JAL-HAZARD): New hazard.
	(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
	New operands.
	(mul, muli, dbnz, iflush): Enable for ms2
	(jal, reti): Has JAL-HAZARD.
	(ldctxt, ldfb, stfb): Only ms1.
	(fbcb): Only ms1,ms1-003.
	(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
	fbcbincrs, mfbcbincrs): Enable for ms2.
	(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
	* ms1.opc (parse_loopsize): New.
	(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
	(print_pcrel): New.

gas:
	Add ms2.
	* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
	(ms1_architectures): Add ms2.
	(md_parse_option): Add ms2.
	(md_show_usage): Add ms2.
	(md_assemble): Add JAL_HAZARD detection logic.
	(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
	* doc/c-ms1.texi: New.
	* doc/all.texi: Add MS1.
	* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
	* doc/Makefile.in: Rebuilt.
	* doc/Makefile: Rebuilt.

gas/testsuite:
	Add ms2.
	* gas/ms1/allinsn.d: Adjust pcrel disassembly.
	* gas/ms1/errors.exp: Fix target triplet.
	* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
	* gas/ms1/ms1-16-003.s: Tweak label.
	* gas/ms1/ms1.exp: Adjust target triplet.  Add ms2 test.
	* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
	* gas/ms1/relocs.d: Adjust expected machine name and pcrel
	disassembly.
	* gas/ms1/relocs.exp: Adjust target triplet.

include:
	Add ms2.
	* elf/ms1.h (EF_MS1_CPU_MS2): New.


opcodes:
	Add ms2.
	* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
	ms1-opc.c, ms1-opc.h: Regenerated.

1 files changed, 33 insertions, 1 deletions

diff --git a/opcodes/ms1-dis.c b/opcodes/ms1-dis.c
index 0026124..bc020de 100644
--- a/opcodes/ms1-dis.c
+++ b/opcodes/ms1-dis.c
@@ -60,6 +60,7 @@ static int read_insn
 
 /* -- dis.c */
 static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
+static void print_pcrel (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
 
 static void
 print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
@@ -77,6 +78,16 @@ print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     print_normal (cd, dis_info, value, attrs, pc, length);
 }
 
+static void
+print_pcrel (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+	     void * dis_info,
+	     long value,
+	     unsigned int attrs ATTRIBUTE_UNUSED,
+	     bfd_vma pc ATTRIBUTE_UNUSED,
+	     int length ATTRIBUTE_UNUSED)
+{
+  print_address (cd, dis_info, value + pc, attrs, pc, length);
+}
 
 /* -- */
 
@@ -129,6 +140,18 @@ ms1_cgen_print_operand (CGEN_CPU_DESC cd,
     case MS1_OPERAND_BRC2 :
       print_dollarhex (cd, info, fields->f_brc2, 0, pc, length);
       break;
+    case MS1_OPERAND_CB1INCR :
+      print_dollarhex (cd, info, fields->f_cb1incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+      break;
+    case MS1_OPERAND_CB1SEL :
+      print_dollarhex (cd, info, fields->f_cb1sel, 0, pc, length);
+      break;
+    case MS1_OPERAND_CB2INCR :
+      print_dollarhex (cd, info, fields->f_cb2incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+      break;
+    case MS1_OPERAND_CB2SEL :
+      print_dollarhex (cd, info, fields->f_cb2sel, 0, pc, length);
+      break;
     case MS1_OPERAND_CBRB :
       print_dollarhex (cd, info, fields->f_cbrb, 0, pc, length);
       break;
@@ -186,8 +209,11 @@ ms1_cgen_print_operand (CGEN_CPU_DESC cd,
     case MS1_OPERAND_IMM16 :
       print_dollarhex (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
       break;
+    case MS1_OPERAND_IMM16L :
+      print_dollarhex (cd, info, fields->f_imm16l, 0, pc, length);
+      break;
     case MS1_OPERAND_IMM16O :
-      print_dollarhex (cd, info, fields->f_imm16s, 0, pc, length);
+      print_pcrel (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
       break;
     case MS1_OPERAND_IMM16Z :
       print_dollarhex (cd, info, fields->f_imm16u, 0, pc, length);
@@ -201,6 +227,9 @@ ms1_cgen_print_operand (CGEN_CPU_DESC cd,
     case MS1_OPERAND_LENGTH :
       print_dollarhex (cd, info, fields->f_length, 0, pc, length);
       break;
+    case MS1_OPERAND_LOOPSIZE :
+      print_pcrel (cd, info, fields->f_loopo, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
+      break;
     case MS1_OPERAND_MASK :
       print_dollarhex (cd, info, fields->f_mask, 0, pc, length);
       break;
@@ -225,6 +254,9 @@ ms1_cgen_print_operand (CGEN_CPU_DESC cd,
     case MS1_OPERAND_RC2 :
       print_dollarhex (cd, info, fields->f_rc2, 0, pc, length);
       break;
+    case MS1_OPERAND_RC3 :
+      print_dollarhex (cd, info, fields->f_rc3, 0, pc, length);
+      break;
     case MS1_OPERAND_RCNUM :
       print_dollarhex (cd, info, fields->f_rcnum, 0, pc, length);
       break;