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| author | H.J. Lu <hjl.tools@gmail.com> | 2008-08-28 14:07:50 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2008-08-28 14:07:50 +0000 |
| commit | 1ca35711f453e9a18d2a23795fc4305ace8eb1d4 (patch) | |
| tree | c575781b0204098113db0a6478b59342b77d7f8b /opcodes/ia64-raw.tbl | |
| parent | b29d32ce5c7f783e1df1f0bf63245c8614e939f6 (diff) | |
| download | binutils-1ca35711f453e9a18d2a23795fc4305ace8eb1d4.zip binutils-1ca35711f453e9a18d2a23795fc4305ace8eb1d4.tar.gz binutils-1ca35711f453e9a18d2a23795fc4305ace8eb1d4.tar.bz2 | |
gas/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-ia64.c (CR_IIB0): New.
(CR_IIB1): Likewise.
(cr): Add cr.iib0 and cr.iib1.
(specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1.
gas/testsuite/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1.
* gas/ia64/dv-waw-err.s: Likewise.
* gas/ia64/regs.s: Likewise.
* gas/ia64/dv-raw-err.l: Updated.
* gas/ia64/dv-waw-err.l: Likewise.
* gas/ia64/regs.d: Likewise.
include/opcode/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update
IA64_RS_CR.
opcodes/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
* ia64-gen.c (lookup_specifier): Likewise.
* ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
* ia64-raw.tbl: Likewise.
* ia64-waw.tbl: Likewise.
* ia64-asmtab.c: Regenerated.
Diffstat (limited to 'opcodes/ia64-raw.tbl')
| -rw-r--r-- | opcodes/ia64-raw.tbl | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/opcodes/ia64-raw.tbl b/opcodes/ia64-raw.tbl index eee0b98..7eca3e3 100644 --- a/opcodes/ia64-raw.tbl +++ b/opcodes/ia64-raw.tbl @@ -53,6 +53,7 @@ CR[IFS]; IC:mov-to-CR-IFS; IC:mov-from-CR-IFS; data CR[IFS]; IC:mov-to-CR-IFS; rfi; implied CR[IFS]; cover; rfi, IC:mov-from-CR-IFS; implied CR[IHA]; IC:mov-to-CR-IHA; IC:mov-from-CR-IHA; data +CR[IIB%], % in 0 - 1; IC:mov-to-CR-IIB; IC:mov-from-CR-IIB; data CR[IIM]; IC:mov-to-CR-IIM; IC:mov-from-CR-IIM; data CR[IIP]; IC:mov-to-CR-IIP; IC:mov-from-CR-IIP; data CR[IIP]; IC:mov-to-CR-IIP; rfi; implied @@ -74,7 +75,7 @@ CR[PTA]; IC:mov-to-CR-PTA; IC:mov-from-CR-PTA, IC:mem-readers, IC:mem-writers, I CR[TPR]; IC:mov-to-CR-TPR; IC:mov-from-CR-TPR, IC:mov-from-CR-IVR; data CR[TPR]; IC:mov-to-CR-TPR; IC:mov-to-PSR-l+17, ssm+17; SC Section 5.8.3.3, "Task Priority Register (TPR Ð CR66)" on page 2:119 CR[TPR]; IC:mov-to-CR-TPR; rfi; implied -CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127; IC:none; IC:mov-from-CR-rv+1; none +CR%, % in 3-7, 10-15, 18, 28-63, 75-79, 82-127; IC:none; IC:mov-from-CR-rv+1; none DBR#; IC:mov-to-IND-DBR+3; IC:mov-from-IND-DBR+3; impliedF DBR#; IC:mov-to-IND-DBR+3; IC:probe-all, IC:lfetch-all, IC:mem-readers, IC:mem-writers; data DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d; IC:mem-readers, IC:mem-writers, IC:non-access; data |