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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-04-09 12:58:50 +0200 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-04-11 21:37:12 +0200 |
| commit | de89d0a34d52a2d2d28a4ce569e926dd9c7a7d13 (patch) | |
| tree | 5212398a0073a3382baa45e65cf6b091762e3111 /opcodes/i386-dis.c | |
| parent | 6295b6da16f73d5113d24424d1897edbce42bc6a (diff) | |
| download | binutils-de89d0a34d52a2d2d28a4ce569e926dd9c7a7d13.zip binutils-de89d0a34d52a2d2d28a4ce569e926dd9c7a7d13.tar.gz binutils-de89d0a34d52a2d2d28a4ce569e926dd9c7a7d13.tar.bz2 | |
Enable Intel WAITPKG instructions.
Intel has disclosed a set of new instructions for Tremont processor.
The spec is
https://software.intel.com/en-us/intel-architecture-instruction-set-extensions-programming-reference
This patch enables Intel WAITPKG instructions.
gas/
* config/tc-i386.c (cpu_arch): Add WAITPKG.
(cpu_noarch): Likewise.
* doc/c-i386.texi: Document WAITPKG.
* i386/i386.exp: Run WAITPKG tests.
* testsuite/gas/i386/waitpkg-intel.d: New test.
* testsuite/gas/i386/waitpkg.d: Likewise.
* testsuite/gas/i386/waitpkg.s: Likewise.
* testsuite/gas/i386/x86-64-waitpkg-intel.d: Likewise.
* testsuite/gas/i386/x86-64-waitpkg.d: Likewise.
* testsuite/gas/i386/x86-64-waitpkg.s: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
PREFIX_MOD_1_0FAE_REG_6.
(va_mode): New.
(OP_E_register): Use va_mode.
* i386-dis-evex.h (prefix_table):
New instructions (see prefixes above).
* i386-gen.c (cpu_flag_init): Add WAITPKG.
(cpu_flags): Likewise.
* i386-opc.h (enum): Likewise.
(i386_cpu_flags): Likewise.
* i386-opc.tbl: Add umonitor, umwait, tpause.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-dis.c')
| -rw-r--r-- | opcodes/i386-dis.c | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 3e45d0e..d6fb42a 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -250,6 +250,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EbS { OP_E, b_swap_mode } #define EbndS { OP_E, bnd_swap_mode } #define Ev { OP_E, v_mode } +#define Eva { OP_E, va_mode } #define Ev_bnd { OP_E, v_bnd_mode } #define EvS { OP_E, v_swap_mode } #define Ed { OP_E, d_mode } @@ -499,6 +500,8 @@ enum v_mode, /* operand size depends on prefixes with operand swapped */ v_swap_mode, + /* operand size depends on address prefix */ + va_mode, /* word operand */ w_mode, /* double word operand */ @@ -1008,7 +1011,8 @@ enum PREFIX_MOD_3_0FAE_REG_4, PREFIX_MOD_0_0FAE_REG_5, PREFIX_MOD_3_0FAE_REG_5, - PREFIX_0FAE_REG_6, + PREFIX_MOD_0_0FAE_REG_6, + PREFIX_MOD_1_0FAE_REG_6, PREFIX_0FAE_REG_7, PREFIX_0FB8, PREFIX_0FBC, @@ -4191,13 +4195,21 @@ static const struct dis386 prefix_table[][4] = { { "incsspK", { Rdq }, PREFIX_OPCODE }, }, - /* PREFIX_0FAE_REG_6 */ + /* PREFIX_MOD_0_0FAE_REG_6 */ { { "xsaveopt", { FXSAVE }, PREFIX_OPCODE }, { "clrssbsy", { Mq }, PREFIX_OPCODE }, { "clwb", { Mb }, PREFIX_OPCODE }, }, + /* PREFIX_MOD_1_0FAE_REG_6 */ + { + { RM_TABLE (RM_0FAE_REG_6) }, + { "umonitor", { Eva }, PREFIX_OPCODE }, + { "tpause", { Em }, PREFIX_OPCODE }, + { "umwait", { Em }, PREFIX_OPCODE }, + }, + /* PREFIX_0FAE_REG_7 */ { { "clflush", { Mb }, 0 }, @@ -11726,8 +11738,8 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0FAE_REG_6 */ - { PREFIX_TABLE (PREFIX_0FAE_REG_6) }, - { RM_TABLE (RM_0FAE_REG_6) }, + { PREFIX_TABLE (PREFIX_MOD_0_0FAE_REG_6) }, + { PREFIX_TABLE (PREFIX_MOD_1_0FAE_REG_6) }, }, { /* MOD_0FAE_REG_7 */ @@ -15109,6 +15121,21 @@ OP_E_register (int bytemode, int sizeflag) used_prefixes |= (prefixes & PREFIX_DATA); } break; + case va_mode: + names = (address_mode == mode_64bit + ? names64 : names32); + if (!(prefixes & PREFIX_ADDR)) + names = (address_mode == mode_16bit + ? names16 : names); + else + { + /* Remove "addr16/addr32". */ + all_prefixes[last_addr_prefix] = 0; + names = (address_mode != mode_32bit + ? names32 : names16); + used_prefixes |= PREFIX_ADDR; + } + break; case mask_bd_mode: case mask_mode: if (reg > 0x7) |