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authorAlan Modra <amodra@gmail.com>2020-01-01 18:46:43 +1030
committerAlan Modra <amodra@gmail.com>2020-01-04 19:20:33 +1030
commit2e98c6c5c5a0d8746f3815ceeb7564acaa0645e1 (patch)
tree6c96ca03e66fc1aabacafd0a9e33e0bbc0dbe3c1 /opcodes/d30v-dis.c
parent991fb595e34598291a52b533fdc8005e1ead0799 (diff)
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ubsan: d30v: left shift cannot be represented in type 'int'
* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
Diffstat (limited to 'opcodes/d30v-dis.c')
-rw-r--r--opcodes/d30v-dis.c18
1 files changed, 6 insertions, 12 deletions
diff --git a/opcodes/d30v-dis.c b/opcodes/d30v-dis.c
index 61bb16d..212d24a 100644
--- a/opcodes/d30v-dis.c
+++ b/opcodes/d30v-dis.c
@@ -271,14 +271,10 @@ print_insn (struct disassemble_info *info,
/* IMM6S3 is unsigned. */
if (oper->flags & OPERAND_SIGNED || bits == 32)
{
- long max;
- max = (1 << (bits - 1));
- if (val & max)
+ unsigned int sign = 1u << (bits - 1);
+ if (val & sign)
{
- if (bits == 32)
- val = -val;
- else
- val = -val & ((1 << bits) - 1);
+ val = -val & (sign + sign - 1);
neg = 1;
}
}
@@ -303,13 +299,11 @@ print_insn (struct disassemble_info *info,
{
if (oper->flags & OPERAND_SIGNED)
{
- int max = (1 << (bits - 1));
+ unsigned int sign = 1u << (bits - 1);
- if (val & max)
+ if (val & sign)
{
- val = -val;
- if (bits < 32)
- val &= ((1 << bits) - 1);
+ val = -val & (sign + sign - 1);
(*info->fprintf_func) (info->stream, "-");
}
}