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| author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-07-24 02:54:06 +0200 |
|---|---|---|
| committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-07-24 02:54:06 +0200 |
| commit | 5cbe549257b0aed1b615714e74bb6a3f066f3253 (patch) | |
| tree | e68230c56c241d79ad0061a2589971a9b0d3ee2b /opcodes/bpf-opc.c | |
| parent | a50ead7822bef29a45d6e660e23264d76545981b (diff) | |
| download | binutils-5cbe549257b0aed1b615714e74bb6a3f066f3253.zip binutils-5cbe549257b0aed1b615714e74bb6a3f066f3253.tar.gz binutils-5cbe549257b0aed1b615714e74bb6a3f066f3253.tar.bz2 | |
bpf: gas,include,opcode: add suppor for instructions BSWAP{16,32,64}
This patch adds support for the BPF V4 ISA byte swap instructions to
opcodes, assembler and disassembler.
Tested in bpf-unknown-none.
include/ChangeLog:
2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
* opcode/bpf.h (BPF_IMM32_BSWAP16): Define.
(BPF_IMM32_BSWAP32): Likewise.
(BPF_IMM32_BSWAP64): Likewise.
(enum bpf_insn_id): New entries BPF_INSN_BSWAP{16,32,64}.
opcodes/ChangeLog:
2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf-opc.c (bpf_opcodes): Add entries for the BSWAP*
instructions.
gas/ChangeLog:
2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
* doc/c-bpf.texi (BPF Instructions): Document BSWAP* instructions.
* testsuite/gas/bpf/alu.s: Test BSWAP{16,32,64} instructions.
* testsuite/gas/bpf/alu.d: Likewise.
* testsuite/gas/bpf/alu-be.d: Likewise.
* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
Diffstat (limited to 'opcodes/bpf-opc.c')
| -rw-r--r-- | opcodes/bpf-opc.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c index e2691ea..00a21c6 100644 --- a/opcodes/bpf-opc.c +++ b/opcodes/bpf-opc.c @@ -182,6 +182,14 @@ const struct bpf_opcode bpf_opcodes[] = {BPF_INSN_ENDBE64, "endbe%W%dr , 64", "%dr = be64%w%dr", BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU|BPF_CODE_END|BPF_SRC_X|BPF_IMM32_END64}, + /* Byte-swap instructions. */ + {BPF_INSN_BSWAP16, "bswap%W%dr , 16", "%dr%w=%wbswap16%w%dr", + BPF_V4, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU64|BPF_CODE_END|BPF_SRC_K|BPF_IMM32_BSWAP16}, + {BPF_INSN_BSWAP32, "bswap%W%dr , 32", "%dr%w=%wbswap32%w%dr", + BPF_V4, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU64|BPF_CODE_END|BPF_SRC_K|BPF_IMM32_BSWAP32}, + {BPF_INSN_BSWAP64, "bswap%W%dr , 64", "%dr%w=%wbswap64%w%dr", + BPF_V4, BPF_CODE|BPF_IMM32, BPF_CLASS_ALU64|BPF_CODE_END|BPF_SRC_K|BPF_IMM32_BSWAP64}, + /* 64-bit load instruction. */ {BPF_INSN_LDDW, "lddw%W%dr , %i64", "%dr = %i64%wll", BPF_V1, BPF_CODE, BPF_CLASS_LD|BPF_SIZE_DW|BPF_MODE_IMM}, |