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| author | Yuriy Kolerov <Yuriy.Kolerov@synopsys.com> | 2024-02-09 14:27:06 +0000 |
|---|---|---|
| committer | Shahab Vahedi <shahab@synopsys.com> | 2024-02-14 11:36:52 +0100 |
| commit | c0852af0565c7a83e17f1358fac52a68e7047002 (patch) | |
| tree | 861a4d3a8af806ff9a16bd7608e4dc8d8b9e5782 /opcodes/arc-tbl.h | |
| parent | b235e90e740aa486e6bbe8243eedf109fed41a5c (diff) | |
| download | binutils-c0852af0565c7a83e17f1358fac52a68e7047002.zip binutils-c0852af0565c7a83e17f1358fac52a68e7047002.tar.gz binutils-c0852af0565c7a83e17f1358fac52a68e7047002.tar.bz2 | |
arc: Put DBNZ instruction to a separate class
DBNZ instruction decrements its source register operand, and if
the result is non-zero it branches to the location defined by a signed
half-word displacement operand.
DBNZ instruction is in BRANCH class as other branch instrucitons
like B, Bcc, etc. However, DBNZ is the only branch instruction
that stores a branch offset in the second operand. Thus it must
be placed in a distinct class and treated differently.
For example, current logic of arc_insn_get_branch_target in GDB
assumes that a branch offset is always stored in the first operand
for BRANCH class and it's wrong for DBNZ.
include/ChangeLog:
2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com>
* opcode/arc.h (enum insn_class_t): Add DBNZ class.
opcodes/ChangeLog:
2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com>
* arc-tbl.h (dbnz): Use "DBNZ" class.
* arc-dis.c (arc_opcode_to_insn_type): Handle "DBNZ" class.
gas/ChangeLog:
2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com>
* config/tc-arc.c (is_br_jmp_insn_p): Add check against "DBNZ".
Diffstat (limited to 'opcodes/arc-tbl.h')
| -rw-r--r-- | opcodes/arc-tbl.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h index e0415c8..4572f7d 100644 --- a/opcodes/arc-tbl.h +++ b/opcodes/arc-tbl.h @@ -3656,7 +3656,7 @@ { "daddh22", 0x36F77F80, 0xFFFF7FE0, ARC_OPCODE_ARCv2EM, FLOAT, DPA, { ZA, LIMM, LIMMdup }, { C_F, C_CC }}, /* dbnz<.d> b,s13 00100bbb1000110N0BBBssssssSSSSSS. */ -{ "dbnz", 0x208C0000, 0xF8FE8000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { RB, SIMM13_A16_20}, { C_DNZ_D }}, +{ "dbnz", 0x208C0000, 0xF8FE8000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, DBNZ, NONE, { RB, SIMM13_A16_20}, { C_DNZ_D }}, /* dexcl1<.f> a,b,c 00110bbb00011000FBBBCCCCCCAAAAAA. */ { "dexcl1", 0x30180000, 0xF8FF0000, ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM, FLOAT, DPX, { RA, RB, RC }, { C_F }}, |