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authorClaudiu Zissulescu <claziss@synopsys.com>2016-09-14 13:40:38 +0200
committerClaudiu Zissulescu <claziss@synopsys.com>2016-09-26 16:47:17 +0200
commit2b848ebdbb2d1f856c7525ed4d6efaf6fe70de81 (patch)
tree55a6c5fb94d76ce44c2ec41f30a06f1daa427b5c /opcodes/arc-tbl.h
parent005d79fd6101dae0aaf62a1b0cee399efcbd0e21 (diff)
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[ARC] ISA alignment.
include/ 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com> * opcode/arc.h (insn_class_t): Add two new classes. opcodes/ 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com> * arc-ext-tbl.h (EXTINSN2OPF): Define. (EXTINSN2OP): Use EXTINSN2OPF. (bspeekm, bspop, modapp): New extension instructions. * arc-opc.c (F_DNZ_ND): Define. (F_DNZ_D): Likewise. (F_SIZEB1): Changed. (C_DNZ_D): Define. (C_HARD): Changed. * arc-tbl.h (dbnz): New instruction. (prealloc): Allow it for ARC EM. (xbfu): Likewise.
Diffstat (limited to 'opcodes/arc-tbl.h')
-rw-r--r--opcodes/arc-tbl.h55
1 files changed, 29 insertions, 26 deletions
diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h
index 7bda40a..682b808 100644
--- a/opcodes/arc-tbl.h
+++ b/opcodes/arc-tbl.h
@@ -3499,6 +3499,9 @@
/* daddh22<.f><.cc> 0,limm,limm 0011011011110111F1111111100QQQQQ. */
{ "daddh22", 0x36F77F80, 0xFFFF7FE0, ARC_OPCODE_ARCv2EM, FLOAT, DPA, { ZA, LIMM, LIMMdup }, { C_F, C_CC }},
+/* dbnz<.d> b,s13 00100bbb1000110N0BBBssssssSSSSSS. */
+{ "dbnz", 0x208C0000, 0xF8FE8000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { RB, SIMM13_A16_20}, { C_DNZ_D }},
+
/* dexcl1<.f> a,b,c 00110bbb00011000FBBBCCCCCCAAAAAA. */
{ "dexcl1", 0x30180000, 0xF8FF0000, ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM, FLOAT, DPX, { RA, RB, RC }, { C_F }},
@@ -12985,22 +12988,22 @@
{ "pop_s", 0x0000C0D1, 0x0000F8FF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BLINK_S }, { 0 }},
/* prealloc<.aa> b,c 00100bbbaa1100010BBBCCCCCC111110. */
-{ "prealloc", 0x2031003E, 0xF83F803F, ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, RB, RC, BRAKETdup }, { C_AA8 }},
+{ "prealloc", 0x2031003E, 0xF83F803F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, RB, RC, BRAKETdup }, { C_AA8 }},
/* prealloc<.aa> b,s9 00010bbbssssssssSBBB0aa001111110. */
-{ "prealloc", 0x1000007E, 0xF80009FF, ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, RB, SIMM9_8, BRAKETdup }, { C_AA21 }},
+{ "prealloc", 0x1000007E, 0xF80009FF, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, RB, SIMM9_8, BRAKETdup }, { C_AA21 }},
/* prealloc<.aa> b,limm 00100bbbaa1100010BBB111110111110. */
-{ "prealloc", 0x20310FBE, 0xF83F8FFF, ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, RB, LIMM, BRAKETdup }, { C_AA8 }},
+{ "prealloc", 0x20310FBE, 0xF83F8FFF, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, RB, LIMM, BRAKETdup }, { C_AA8 }},
/* prealloc limm,c 00100110RR1100010111CCCCCC111110. */
-{ "prealloc", 0x2631703E, 0xFF3FF03F, ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, LIMM, RC, BRAKETdup }, { 0 }},
+{ "prealloc", 0x2631703E, 0xFF3FF03F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, LIMM, RC, BRAKETdup }, { 0 }},
/* prealloc limm 000101100000000001110RR001111110. */
-{ "prealloc", 0x1600707E, 0xFFFFF9FF, ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, LIMM, BRAKETdup }, { 0 }},
+{ "prealloc", 0x1600707E, 0xFFFFF9FF, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, LIMM, BRAKETdup }, { 0 }},
/* prealloc limm,s9 00010110ssssssssS1110RR001111110. */
-{ "prealloc", 0x1600707E, 0xFF0079FF, ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, LIMM, SIMM9_8, BRAKETdup }, { 0 }},
+{ "prealloc", 0x1600707E, 0xFF0079FF, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, LIMM, SIMM9_8, BRAKETdup }, { 0 }},
/* prefetch<.aa> b,c 00100bbbaa1100000BBBCCCCCC111110. */
{ "prefetch", 0x2030003E, 0xF83F803F, ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MEMORY, NONE, { BRAKET, RB, RC, BRAKETdup }, { C_AA8 }},
@@ -18061,64 +18064,64 @@
{ "wlfc", 0x216F103F, 0xFFFFF03F, ARC_OPCODE_ARCv2HS, KERNEL, NONE, { UIMM6_20 }, { 0 }},
/* xbfu<.f> a,b,c 00100bbb00101101FBBBCCCCCCAAAAAA. */
-{ "xbfu", 0x202D0000, 0xF8FF0000, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, RB, RC }, { C_F }},
+{ "xbfu", 0x202D0000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, RB, RC }, { C_F }},
/* xbfu<.f> 0,b,c 00100bbb00101101FBBBCCCCCC111110. */
-{ "xbfu", 0x202D003E, 0xF8FF003F, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, RB, RC }, { C_F }},
+{ "xbfu", 0x202D003E, 0xF8FF003F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, RB, RC }, { C_F }},
/* xbfu<.f><.cc> b,b,c 00100bbb11101101FBBBCCCCCC0QQQQQ. */
-{ "xbfu", 0x20ED0000, 0xF8FF0020, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RB, RBdup, RC }, { C_F, C_CC }},
+{ "xbfu", 0x20ED0000, 0xF8FF0020, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RB, RBdup, RC }, { C_F, C_CC }},
/* xbfu<.f> a,b,u6 00100bbb01101101FBBBuuuuuuAAAAAA. */
-{ "xbfu", 0x206D0000, 0xF8FF0000, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, RB, UIMM6_20 }, { C_F }},
+{ "xbfu", 0x206D0000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, RB, UIMM6_20 }, { C_F }},
/* xbfu<.f> 0,b,u6 00100bbb01101101FBBBuuuuuu111110. */
-{ "xbfu", 0x206D003E, 0xF8FF003F, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, RB, UIMM6_20 }, { C_F }},
+{ "xbfu", 0x206D003E, 0xF8FF003F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, RB, UIMM6_20 }, { C_F }},
/* xbfu<.f><.cc> b,b,u6 00100bbb11101101FBBBuuuuuu1QQQQQ. */
-{ "xbfu", 0x20ED0020, 0xF8FF0020, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RB, RBdup, UIMM6_20 }, { C_F, C_CC }},
+{ "xbfu", 0x20ED0020, 0xF8FF0020, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RB, RBdup, UIMM6_20 }, { C_F, C_CC }},
/* xbfu<.f> b,b,s12 00100bbb10101101FBBBssssssSSSSSS. */
-{ "xbfu", 0x20AD0000, 0xF8FF0000, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RB, RBdup, SIMM12_20 }, { C_F }},
+{ "xbfu", 0x20AD0000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RB, RBdup, SIMM12_20 }, { C_F }},
/* xbfu<.f> a,limm,c 0010011000101101F111CCCCCCAAAAAA. */
-{ "xbfu", 0x262D7000, 0xFFFF7000, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, LIMM, RC }, { C_F }},
+{ "xbfu", 0x262D7000, 0xFFFF7000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, LIMM, RC }, { C_F }},
/* xbfu<.f> a,b,limm 00100bbb00101101FBBB111110AAAAAA. */
-{ "xbfu", 0x202D0F80, 0xF8FF0FC0, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, RB, LIMM }, { C_F }},
+{ "xbfu", 0x202D0F80, 0xF8FF0FC0, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, RB, LIMM }, { C_F }},
/* xbfu<.f> 0,limm,c 0010011000101101F111CCCCCC111110. */
-{ "xbfu", 0x262D703E, 0xFFFF703F, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, RC }, { C_F }},
+{ "xbfu", 0x262D703E, 0xFFFF703F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, RC }, { C_F }},
/* xbfu<.f> 0,b,limm 00100bbb00101101FBBB111110111110. */
-{ "xbfu", 0x202D0FBE, 0xF8FF0FFF, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, RB, LIMM }, { C_F }},
+{ "xbfu", 0x202D0FBE, 0xF8FF0FFF, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, RB, LIMM }, { C_F }},
/* xbfu<.f><.cc> b,b,limm 00100bbb11101101FBBB1111100QQQQQ. */
-{ "xbfu", 0x20ED0F80, 0xF8FF0FE0, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RB, RBdup, LIMM }, { C_F, C_CC }},
+{ "xbfu", 0x20ED0F80, 0xF8FF0FE0, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RB, RBdup, LIMM }, { C_F, C_CC }},
/* xbfu<.f><.cc> 0,limm,c 0010011011101101F111CCCCCC0QQQQQ. */
-{ "xbfu", 0x26ED7000, 0xFFFF7020, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, RC }, { C_F, C_CC }},
+{ "xbfu", 0x26ED7000, 0xFFFF7020, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, RC }, { C_F, C_CC }},
/* xbfu<.f> a,limm,u6 0010011001101101F111uuuuuuAAAAAA. */
-{ "xbfu", 0x266D7000, 0xFFFF7000, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, LIMM, UIMM6_20 }, { C_F }},
+{ "xbfu", 0x266D7000, 0xFFFF7000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, LIMM, UIMM6_20 }, { C_F }},
/* xbfu<.f> 0,limm,u6 0010011001101101F111uuuuuu111110. */
-{ "xbfu", 0x266D703E, 0xFFFF703F, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, UIMM6_20 }, { C_F }},
+{ "xbfu", 0x266D703E, 0xFFFF703F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, UIMM6_20 }, { C_F }},
/* xbfu<.f><.cc> 0,limm,u6 0010011011101101F111uuuuuu1QQQQQ. */
-{ "xbfu", 0x26ED7020, 0xFFFF7020, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, UIMM6_20 }, { C_F, C_CC }},
+{ "xbfu", 0x26ED7020, 0xFFFF7020, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, UIMM6_20 }, { C_F, C_CC }},
/* xbfu<.f> 0,limm,s12 0010011010101101F111ssssssSSSSSS. */
-{ "xbfu", 0x26AD7000, 0xFFFF7000, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, SIMM12_20 }, { C_F }},
+{ "xbfu", 0x26AD7000, 0xFFFF7000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, SIMM12_20 }, { C_F }},
/* xbfu<.f> a,limm,limm 0010011000101101F111111110AAAAAA. */
-{ "xbfu", 0x262D7F80, 0xFFFF7FC0, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, LIMM, LIMMdup }, { C_F }},
+{ "xbfu", 0x262D7F80, 0xFFFF7FC0, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { RA, LIMM, LIMMdup }, { C_F }},
/* xbfu<.f> 0,limm,limm 0010011000101101F111111110111110. */
-{ "xbfu", 0x262D7FBE, 0xFFFF7FFF, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, LIMMdup }, { C_F }},
+{ "xbfu", 0x262D7FBE, 0xFFFF7FFF, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, LIMMdup }, { C_F }},
/* xbfu<.f><.cc> 0,limm,limm 0010011011101101F1111111100QQQQQ. */
-{ "xbfu", 0x26ED7F80, 0xFFFF7FE0, ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, LIMMdup }, { C_F, C_CC }},
+{ "xbfu", 0x26ED7F80, 0xFFFF7FE0, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, SHFT2, { ZA, LIMM, LIMMdup }, { C_F, C_CC }},
/* xor<.f> a,b,c 00100bbb00000111FBBBCCCCCCAAAAAA. */
{ "xor", 0x20070000, 0xF8FF0000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOGICAL, NONE, { RA, RB, RC }, { C_F }},