[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Extension

This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions which is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.

This patch add support to the Tag generation instructions from
MTE. These are the following instructions added in this patch:
- IRG <Xd|SP>, <Xn|SP>{, Xm}
- ADDG <Xd|SP>, <Xn|SP>, #<uimm1>. #<uimm2>
- SUBG <Xd|SP>, <Xn|SP>, #<uimm1>. #<uimm2>
- GMI <Xd>, <Xn|SP>, <Xm>

where
<Xd|SP> : Is the 64-bit destination GPR or Stack pointer.
<Xn|SP> : Is the 64-bit source GPR or Stack pointer.
<uimm6> : Is the unsigned immediate, a multiple of 16
in the range 0 to 1008.
<uimm4> : Is the unsigned immediate, in the range 0 to 15.

*** include/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (aarch64_opnd): Add
	AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.

*** opcodes/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-opc.h (aarch64_field_kind): New FLD_imm4_3.
	(OPD_F_SHIFT_BY_4, operand_need_shift_by_four): New.
	* aarch64-opc.c (fields): Add entry for imm4_3.
	(operand_general_constraint_met_p): Add cases for
	AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
	(aarch64_print_operand): Likewise.
	* aarch64-tbl.h (QL_ADDG): New.
	(aarch64_opcode_table): Add addg, subg, irg and gmi.
	(AARCH64_OPERANDS): Define UIMM4_ADDG and UIMM10.
	* aarch64-asm.c (aarch64_ins_imm): Add case for
	operand_need_shift_by_four.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

*** gas/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (parse_operands): Add switch case for
	AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
	* testsuite/gas/aarch64/armv8_5-a-memtag.s: New.
	* testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
	* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
	* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
	* testsuite/gas/aarch64/illegal-memtag.d: Likewise.

1 files changed, 59 insertions, 57 deletions

diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index e3c30ef..d6ae4d9 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -83,7 +83,9 @@ const struct aarch64_operand aarch64_operands[] =
   {AARCH64_OPND_CLASS_IMMEDIATE, "UIMM3_OP1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_op1}, "a 3-bit unsigned immediate"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "UIMM3_OP2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_op2}, "a 3-bit unsigned immediate"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "UIMM4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "a 4-bit unsigned immediate"},
+  {AARCH64_OPND_CLASS_IMMEDIATE, "UIMM4_ADDG", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm4_3}, "a 4-bit unsigned Logical Address Tag modifier"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "UIMM7", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm, FLD_op2}, "a 7-bit unsigned immediate"},
+  {AARCH64_OPND_CLASS_IMMEDIATE, "UIMM10", OPD_F_SHIFT_BY_4 | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_immr}, "a 10-bit unsigned multiple of 16"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "BIT_NUM", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_b5, FLD_b40}, "the bit number to be tested"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "EXCEPTION", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm16}, "a 16-bit unsigned immediate"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "CCMP_IMM", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm5}, "a 5-bit unsigned immediate"},
@@ -228,86 +230,86 @@ const struct aarch64_operand aarch64_operands[] =
 static const unsigned op_enum_table [] =
 {
   0,
-  873,
-  874,
-  875,
+  877,
   878,
   879,
-  880,
-  881,
   882,
-  876,
-  877,
   883,
   884,
-  906,
-  907,
-  908,
+  885,
+  886,
+  880,
+  881,
+  887,
+  888,
+  910,
   911,
   912,
-  913,
-  914,
   915,
-  909,
-  910,
   916,
   917,
-  965,
-  966,
-  967,
-  968,
+  918,
+  919,
+  913,
+  914,
+  920,
+  921,
+  969,
+  970,
+  971,
+  972,
   12,
-  634,
-  635,
-  1160,
-  1162,
+  636,
+  637,
   1164,
-  972,
-  1163,
-  1161,
-  316,
-  622,
-  633,
-  632,
-  970,
-  629,
-  626,
-  618,
-  617,
+  1166,
+  1168,
+  976,
+  1167,
+  1165,
+  318,
   624,
-  625,
+  635,
+  634,
+  974,
+  631,
   628,
+  620,
+  619,
+  626,
+  627,
   630,
-  631,
-  980,
-  662,
+  632,
+  633,
+  984,
+  664,
+  667,
+  670,
   665,
   668,
-  663,
-  666,
-  817,
-  176,
-  177,
+  821,
   178,
   179,
-  514,
-  751,
-  387,
+  180,
+  181,
+  516,
+  755,
   389,
-  411,
+  391,
   413,
-  1233,
-  1238,
-  1231,
-  1230,
+  415,
+  1237,
+  1242,
+  1235,
   1234,
-  1241,
-  1243,
-  1244,
-  1240,
-  1246,
+  1238,
   1245,
-  129,
+  1247,
+  1248,
+  1244,
+  1250,
+  1249,
+  131,
 };
 
 /* Given the opcode enumerator OP, return the pointer to the corresponding