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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-10 14:05:01 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-10 14:10:15 +0000 |
| commit | c8a6db6fa0b06b978e5b63593a6b0cb3300ad259 (patch) | |
| tree | f20dce99ea7b13923aa1e8b7f143aaef27d70126 /opcodes/aarch64-asm-2.c | |
| parent | af117b3cf1877da805d081b93f606f3dd8153502 (diff) | |
| download | binutils-c8a6db6fa0b06b978e5b63593a6b0cb3300ad259.zip binutils-c8a6db6fa0b06b978e5b63593a6b0cb3300ad259.tar.gz binutils-c8a6db6fa0b06b978e5b63593a6b0cb3300ad259.tar.bz2 | |
[AArch64][PATCH 1/2] Add support for RAS instruction ESB.
The ARMv8.2 RAS extension adds a new barrier instruction ESB as an alias
and the preferred form of HINT 16.
This patch adds an architectural feature flag for the RAS extension and
includes it in the features selected enabled by -march=armv8.2-a. It
also adds the ESB instruction, making it available whenever the RAS
feature is enabled.
Because ESB is the preferred form and because the target architecture
isn't available to the disassembler, HINT 16 will be disassembled as ESB
even when the target has no support for the RAS extension.
gas/testsuite/
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/system-2.d: New.
* gas/aarch64/system-2.s: New.
* gas/aarch64/system.d: Adjust expected output for HINT 16.
include/opcode/
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (AARCH64_FEATURE_RAS): New.
(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_RAS.
opcodes/
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-tbl.h (aarch64_feature_ras): New.
(RAS): New.
(aarch64_opcode_table): Add "esb".
Change-Id: Id4713917da15cca3b977284f43febd1c9b3d9faf
Diffstat (limited to 'opcodes/aarch64-asm-2.c')
| -rw-r--r-- | opcodes/aarch64-asm-2.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c index 64bc136..2d1a22b 100644 --- a/opcodes/aarch64-asm-2.c +++ b/opcodes/aarch64-asm-2.c @@ -422,6 +422,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode) case 1004: /* movz */ value = 1004; /* --> movz. */ break; + case 1017: /* esb */ case 1016: /* sevl */ case 1015: /* sev */ case 1014: /* wfi */ @@ -431,12 +432,12 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode) case 1010: /* hint */ value = 1010; /* --> hint. */ break; - case 1025: /* tlbi */ - case 1024: /* ic */ - case 1023: /* dc */ - case 1022: /* at */ - case 1021: /* sys */ - value = 1021; /* --> sys. */ + case 1026: /* tlbi */ + case 1025: /* ic */ + case 1024: /* dc */ + case 1023: /* at */ + case 1022: /* sys */ + value = 1022; /* --> sys. */ break; default: return NULL; } |