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author | Faraz Shahbazker <fshahbazker@wavecomp.com> | 2019-05-13 17:19:37 -0700 |
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committer | Faraz Shahbazker <fshahbazker@wavecomp.com> | 2019-05-21 09:28:24 -0700 |
commit | cd4797ee054654160fe6c4b6fbecd636b7961e19 (patch) | |
tree | 32ffbea3f566a32ed45fbb668a121a21bed2b820 /opcodes/ChangeLog | |
parent | 3734320dc054bd9f6632607e9e5c901c57450791 (diff) | |
download | binutils-cd4797ee054654160fe6c4b6fbecd636b7961e19.zip binutils-cd4797ee054654160fe6c4b6fbecd636b7961e19.tar.gz binutils-cd4797ee054654160fe6c4b6fbecd636b7961e19.tar.bz2 |
MIPS/gas: Reject $0 as source register for DAUI instruction
The MIPS64R6 TRM requires that the source register for DAUI
not be r0.
[1] "MIPS Architecture for Programmers Volume II-A: The MIPS64
Instruction Set Manual", Imagination Technologies Ltd., Document
Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2
"Alphabetical List of Instructions", pp. 67-68.
gas/
* testsuite/gas/mips/r6-branch-constraints.s: Rename to ...
* testsuite/gas/mips/r6-reg-constraints.s: this and add test
case for DAUI.
* testsuite/gas/mips/r6-branch-constraints.l: Rename to ...
* testsuite/gas/mips/r6-reg-constraints.l: this and add test
for DAUI.
* testsuite/gas/mips/mips.exp: Rename test from
r6-branch-constraints to r6-reg-constraints.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Change source register
constraint for DAUI.
Diffstat (limited to 'opcodes/ChangeLog')
-rw-r--r-- | opcodes/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 61adb8e4..7f061c2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2019-05-21 Faraz Shahbazker <fshahbazker@wavecomp.com> + + * mips-opc.c (mips_builtin_opcodes): Change source register + constraint for DAUI. + 2019-05-20 Nick Clifton <nickc@redhat.com> * po/fr.po: Updated French translation. |