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| author | Hu, Lin1 <lin1.hu@intel.com> | 2025-01-14 10:30:36 +0800 |
|---|---|---|
| committer | Haochen Jiang <haochen.jiang@intel.com> | 2025-01-14 10:30:36 +0800 |
| commit | b41ab42df1ed8cfda4f3dd83f001dd693ede7ec1 (patch) | |
| tree | a53b0cd91d3e61c0e87e35c90f84e8f0fdc9b098 /ltoptions.m4 | |
| parent | 9421775ba4c7ec94d64a366a96f059e0195a105c (diff) | |
| download | binutils-b41ab42df1ed8cfda4f3dd83f001dd693ede7ec1.zip binutils-b41ab42df1ed8cfda4f3dd83f001dd693ede7ec1.tar.gz binutils-b41ab42df1ed8cfda4f3dd83f001dd693ede7ec1.tar.bz2 | |
Support Intel MOVRS
This patch focus on supporting MOVRS ISA. We could take this full ISA
as four part: PREFETCHRST2, MOVRS, MOVRS APX_F extension and MOVRS AVX10.2
extension.
The APX_F extension for MOVRS will be:
- EVEX.LLZ.NP.MAP4.WIG 8A !(11):rrr:bbb for r8/m8 with NF=0 and
ND=0
- EVEX.LLZ.NP/66.MAP4.SCALABLE 8B !(11):rrr:bbb for rv/mv with NF=0
and ND=0
We did not merge the table together for APX_F since there is an explicit
x64 for movrs insn. The current APX_F() did not support the combination
between CPUIDs. Also, the space is different for legacy and apx_f forms.
gas/ChangeLog:
* NEWS: Support Intel MOVRS.
* config/tc-i386.c: Add MOVRS.
* doc/c-i386.texi: Document .movrs.
* testsuite/gas/i386/i386.exp: Run MOVRS tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d: Add MOVRS
tests.
* testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d: Ditto.
* testsuite/gas/i386/x86-64-apx-evex-promoted.d: Ditto.
* testsuite/gas/i386/x86-64-apx-evex-promoted.s: Ditto.
* testsuite/gas/i386/lfence-load.d: Add prefetchrst2.
* testsuite/gas/i386/lfence-load.s: Ditto.
* testsuite/gas/i386/nops-8.d: Ditto.
* testsuite/gas/i386/prefetch-intel.d: Ditto.
* testsuite/gas/i386/prefetch.d: Ditto.
* testsuite/gas/i386/x86-64-lfence-load.d: Ditto.
* testsuite/gas/i386/x86-64-lfence-load.s: Ditto.
* testsuite/gas/i386/x86-64-prefetch-intel.d: Ditto.
* testsuite/gas/i386/x86-64-prefetch.d: Ditto.
* testsuite/gas/i386/movrs-intel.d: New test.
* testsuite/gas/i386/movrs-inval.l: Ditto.
* testsuite/gas/i386/movrs-inval.s: Ditto.
* testsuite/gas/i386/movrs.d: Ditto.
* testsuite/gas/i386/movrs.s: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-256-intel.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-256.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-256.s: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-512-intel.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-512.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-512.s: Ditto.
* testsuite/gas/i386/x86-64-movrs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-movrs.d: Ditto.
* testsuite/gas/i386/x86-64-movrs.s: Ditto.
* testsuite/gas/i386/x86-64-movrs-intel-suffix.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-suffix.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-suffix.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-prefix.h: Add PREFIX_EVEX_MAP5_6F_X86_64.
* i386-dis-evex-x86.h: Add X86_64_EVEX_MAP5_6F.
* i386-dis-evex.h (evex_table): New entry for movrs.
* i386-dis.c (MOD_0F18_REG_4): New.
(PREFIX_EVEX_MAP5_6F_X86_64): Ditto.
(X86_64_0F388A): Ditto.
(X86_64_0F388B): Ditto.
(X86_64_EVEX_MAP5_6F): Ditto.
(three_byte_table): New entry for MOVRS.
(reg_table): Ditto.
(mod_table): Ditto.
(x86_64_table): Ditto. Also include i386-dis-evex-x86.h.
* i386-gen.c (cpu_flags): Add MOVRS.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (i386_cpu_flags): Add cpumovrs.
* i386-opc.tbl: Add MOVRS instrctions.
* i386-tbl.h: Regenerated.
Co-authored-by: Haochen Jiang <haochen.jiang@intel.com>
Co-authored-by: Lili Cui <lili.cui@intel.com>
Diffstat (limited to 'ltoptions.m4')
0 files changed, 0 insertions, 0 deletions