RISC-V: Fix ld relax failure with calls and align directives.

Make _bfd_riscv_relax_call handle section alignment padding same as
the _bfd_riscv_relax_lui and _bfd_riscv_relax_pc functions already
do.  Use the max section alignment if section boundaries are crossed,
otherwise the alignment of the containing section.

	bfd/
	PR 25181
	* elfnn-riscv.c (_bfd_riscv_relax_call): Always add max_alignment to
	foff.  If sym_sec->output_section and sec->output_section are the same
	and not *ABS* then set max_alignment to that section's alignment.

	ld/
	PR 25181
	* testsuite/ld-riscv-elf/call-relax-0.s: New file.
	* testsuite/ld-riscv-elf/call-relax-1.s: New file.
	* testsuite/ld-riscv-elf/call-relax-2.s: New file.
	* testsuite/ld-riscv-elf/call-relax-3.s: New file.
	* testsuite/ld-riscv-elf/call-relax.d: New test.
	* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run call-relax test.

Change-Id: Iaf65cee52345abf1955f36e8e72c4f6cc0db8d9a

7 files changed, 51 insertions, 0 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index ad7cfd5..39646cb 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,13 @@
+2019-11-12  Jim Wilson  <jimw@sifive.com>
+
+	PR 25181
+	* testsuite/ld-riscv-elf/call-relax-0.s: New file.
+	* testsuite/ld-riscv-elf/call-relax-1.s: New file.
+	* testsuite/ld-riscv-elf/call-relax-2.s: New file.
+	* testsuite/ld-riscv-elf/call-relax-3.s: New file.
+	* testsuite/ld-riscv-elf/call-relax.d: New test.
+	* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run call-relax test.
+
 2019-11-08  Alan Modra  <amodra@gmail.com>
 
 	* emulparams/aarch64elf.sh: Revert 2019-11-05 change.
diff --git a/ld/testsuite/ld-riscv-elf/call-relax-0.s b/ld/testsuite/ld-riscv-elf/call-relax-0.s
new file mode 100644
index 0000000..4b18bf3
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/call-relax-0.s
@@ -0,0 +1,9 @@
+.globl _start
+
+.section .text.hot
+_start:
+    call cc
+
+.text
+ff:
+    call dd
diff --git a/ld/testsuite/ld-riscv-elf/call-relax-1.s b/ld/testsuite/ld-riscv-elf/call-relax-1.s
new file mode 100644
index 0000000..270aaad
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/call-relax-1.s
@@ -0,0 +1,6 @@
+.globl align1
+
+.text
+.balign 32
+align1:
+    csrr a0, sie
diff --git a/ld/testsuite/ld-riscv-elf/call-relax-2.s b/ld/testsuite/ld-riscv-elf/call-relax-2.s
new file mode 100644
index 0000000..2521d1c
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/call-relax-2.s
@@ -0,0 +1,7 @@
+.globl align2
+
+.text
+.balign 4
+align2:
+    csrr a0, sie
+.fill 0xfffb6
diff --git a/ld/testsuite/ld-riscv-elf/call-relax-3.s b/ld/testsuite/ld-riscv-elf/call-relax-3.s
new file mode 100644
index 0000000..3eb04d8
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/call-relax-3.s
@@ -0,0 +1,9 @@
+.globl cc
+.globl dd
+
+.text
+cc:
+    csrr a0, sie
+    csrr a1, sie
+dd:
+    ret
diff --git a/ld/testsuite/ld-riscv-elf/call-relax.d b/ld/testsuite/ld-riscv-elf/call-relax.d
new file mode 100644
index 0000000..46d9c84
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/call-relax.d
@@ -0,0 +1,9 @@
+#name: call relaxation with alignment
+#source: call-relax-0.s
+#source: call-relax-1.s
+#source: call-relax-2.s
+#source: call-relax-3.s
+#as: -march=rv32ic
+#ld: -melf32lriscv
+#objdump: -d
+#pass
diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
index 0a7ac59..7aabbdd 100644
--- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
+++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
@@ -20,6 +20,7 @@
 #
 
 if [istarget "riscv*-*-*"] {
+    run_dump_test "call-relax"
     run_dump_test "c-lui"
     run_dump_test "c-lui-2"
     run_dump_test "disas-jalr"