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authorDaniel Jacobowitz <drow@false.org>2005-01-31 22:01:02 +0000
committerDaniel Jacobowitz <drow@false.org>2005-01-31 22:01:02 +0000
commit4d4ee08e8c9f42bf7e2db1ff701561de1ddf169b (patch)
treebe20f6ecbf0f2c16bd323df6bda6a132c1c86c2e /ld/testsuite
parent99f99b32cbee7f362257f0816edd122be3275862 (diff)
downloadbinutils-4d4ee08e8c9f42bf7e2db1ff701561de1ddf169b.zip
binutils-4d4ee08e8c9f42bf7e2db1ff701561de1ddf169b.tar.gz
binutils-4d4ee08e8c9f42bf7e2db1ff701561de1ddf169b.tar.bz2
* ld-mips-elf/elf-rel-got-n32.d, ld-mips-elf/elf-rel-got-n64-linux.d,
ld-mips-elf/elf-rel-got-n64.d, ld-mips-elf/elf-rel-xgot-n32.d, ld-mips-elf/elf-rel-xgot-n64-linux.d, ld-mips-elf/elf-rel-xgot-n64.d, ld-mips-elf/jalbal.d: Force big-endian. * ld-mips-elf/multi-got-1.d: Make more flexible. * ld-mips-elf/rel32-n32.d, ld-mips-elf/rel32-o32.d, ld-mips-elf/rel64.d: Update offsets.
Diffstat (limited to 'ld/testsuite')
-rw-r--r--ld/testsuite/ChangeLog10
-rw-r--r--ld/testsuite/ld-mips-elf/elf-rel-got-n32.d2
-rw-r--r--ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d2
-rw-r--r--ld/testsuite/ld-mips-elf/elf-rel-got-n64.d2
-rw-r--r--ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d2
-rw-r--r--ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d2
-rw-r--r--ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d2
-rw-r--r--ld/testsuite/ld-mips-elf/jalbal.d2
-rw-r--r--ld/testsuite/ld-mips-elf/multi-got-1.d16404
-rw-r--r--ld/testsuite/ld-mips-elf/rel32-n32.d10
-rw-r--r--ld/testsuite/ld-mips-elf/rel32-o32.d11
-rw-r--r--ld/testsuite/ld-mips-elf/rel64.d10
12 files changed, 8234 insertions, 8225 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index d2f5d4f..6850a0b 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,5 +1,15 @@
2005-01-31 Daniel Jacobowitz <dan@codesourcery.com>
+ * ld-mips-elf/elf-rel-got-n32.d, ld-mips-elf/elf-rel-got-n64-linux.d,
+ ld-mips-elf/elf-rel-got-n64.d, ld-mips-elf/elf-rel-xgot-n32.d,
+ ld-mips-elf/elf-rel-xgot-n64-linux.d, ld-mips-elf/elf-rel-xgot-n64.d,
+ ld-mips-elf/jalbal.d: Force big-endian.
+ * ld-mips-elf/multi-got-1.d: Make more flexible.
+ * ld-mips-elf/rel32-n32.d, ld-mips-elf/rel32-o32.d,
+ ld-mips-elf/rel64.d: Update offsets.
+
+2005-01-31 Daniel Jacobowitz <dan@codesourcery.com>
+
* ld-elf/group1.d: Accept OBJECT symbols.
2005-01-31 Richard Sandiford <rsandifo@redhat.com>
diff --git a/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d b/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d
index 91479ec..5b3df07 100644
--- a/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d
+++ b/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d
@@ -1,5 +1,5 @@
#name: MIPS ELF got reloc n32
-#as: -n32 -KPIC
+#as: -EB -n32 -KPIC
#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n32.s
#ld: -melf32btsmipn32
#objdump: -D --show-raw-insn
diff --git a/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d b/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d
index 85d99b9..f885d9d 100644
--- a/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d
+++ b/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d
@@ -1,5 +1,5 @@
#name: MIPS ELF got reloc n64
-#as: -64 -KPIC
+#as: -EB -64 -KPIC
#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n64.s
#ld: -melf64btsmip
#objdump: -D --show-raw-insn
diff --git a/ld/testsuite/ld-mips-elf/elf-rel-got-n64.d b/ld/testsuite/ld-mips-elf/elf-rel-got-n64.d
index 050ab89..3047911 100644
--- a/ld/testsuite/ld-mips-elf/elf-rel-got-n64.d
+++ b/ld/testsuite/ld-mips-elf/elf-rel-got-n64.d
@@ -1,5 +1,5 @@
#name: MIPS ELF got reloc n64
-#as: -64 -KPIC
+#as: -EB -64 -KPIC
#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n64.s
#ld: -melf64btsmip
#objdump: -D --show-raw-insn
diff --git a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d
index 28ecdca..0f992f5 100644
--- a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d
+++ b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d
@@ -1,5 +1,5 @@
#name: MIPS ELF xgot reloc n32
-#as: -n32 -KPIC -xgot
+#as: -EB -n32 -KPIC -xgot
#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n32.s
#ld: -melf32btsmipn32
#objdump: -D --show-raw-insn
diff --git a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d
index 04c633b..60a89a8 100644
--- a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d
+++ b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d
@@ -1,5 +1,5 @@
#name: MIPS ELF xgot reloc n64
-#as: -64 -KPIC -xgot
+#as: -EB -64 -KPIC -xgot
#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n64.s
#ld: -melf64btsmip
#objdump: -D --show-raw-insn
diff --git a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d
index 1cdf42d..b07c861 100644
--- a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d
+++ b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d
@@ -1,5 +1,5 @@
#name: MIPS ELF xgot reloc n64
-#as: -64 -KPIC -xgot
+#as: -EB -64 -KPIC -xgot
#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n64.s
#ld: -melf64btsmip
#objdump: -D --show-raw-insn
diff --git a/ld/testsuite/ld-mips-elf/jalbal.d b/ld/testsuite/ld-mips-elf/jalbal.d
index 9b50754..bc9a512 100644
--- a/ld/testsuite/ld-mips-elf/jalbal.d
+++ b/ld/testsuite/ld-mips-elf/jalbal.d
@@ -1,7 +1,7 @@
#name: jal to bal
#source: jalbal.s
#as: -EB -n32 -march=rm9000
-#ld: -e s1 -Ttext 0x100000a0
+#ld: -EB -e s1 -Ttext 0x100000a0
#objdump: -d
.*file format elf.*mips.*
diff --git a/ld/testsuite/ld-mips-elf/multi-got-1.d b/ld/testsuite/ld-mips-elf/multi-got-1.d
index c70d022..42ca3cf 100644
--- a/ld/testsuite/ld-mips-elf/multi-got-1.d
+++ b/ld/testsuite/ld-mips-elf/multi-got-1.d
@@ -2,8225 +2,8225 @@
#as: -EB -32 -KPIC
#source: multi-got-1-1.s
#source: multi-got-1-2.s
-#ld: -EB -melf32btsmip -shared
+#ld: -melf32btsmip -shared
#readelf: -d -r
-Dynamic segment at offset 0xcc contains 18 entries:
+Dynamic section at offset 0xcc contains 18 entries:
Tag Type Name/Value
0x00000004 \(HASH\) 0x184
- 0x00000005 \(STRTAB\) 0x58388
- 0x00000006 \(SYMTAB\) 0x18228
+ 0x00000005 \(STRTAB\) 0x[0-9a-f]+
+ 0x00000006 \(SYMTAB\) 0x[0-9a-f]+
0x0000000a \(STRSZ\) 178090 \(bytes\)
0x0000000b \(SYMENT\) 16 \(bytes\)
0x00000015 \(DEBUG\) 0x0
- 0x00000003 \(PLTGOT\) 0xe3ba0
- 0x00000011 \(REL\) 0x83b34
+ 0x00000003 \(PLTGOT\) 0x[0-9a-f]+
+ 0x00000011 \(REL\) 0x[0-9a-f]+
0x00000012 \(RELSZ\) 65544 \(bytes\)
0x00000013 \(RELENT\) 8 \(bytes\)
0x70000001 \(MIPS_RLD_VERSION\) 1
0x70000005 \(MIPS_FLAGS\) NOTPOT
0x70000006 \(MIPS_BASE_ADDRESS\) 0
0x7000000a \(MIPS_LOCAL_GOTNO\) 12
- 0x70000011 \(MIPS_SYMTABNO\) 16406
- 0x70000012 \(MIPS_UNREFEXTNO\) 13
- 0x70000013 \(MIPS_GOTSYM\) 0x16
+ 0x70000011 \(MIPS_SYMTABNO\) 16399
+ 0x70000012 \(MIPS_UNREFEXTNO\) 14
+ 0x70000013 \(MIPS_GOTSYM\) 0xf
0x00000000 \(NULL\) 0x0
-Relocation section '\.rel\.dyn' at offset 0x83b34 contains 8203 entries:
+Relocation section '\.rel\.dyn' at offset 0x[0-9a-f]+ contains 8203 entries:
Offset Info Type Sym.Value Sym. Name
00000000 00000000 R_MIPS_NONE
-^[0-9a-f]+ 00201603 R_MIPS_REL32 0009f740 sym_2_3817
-^[0-9a-f]+ 00201703 R_MIPS_REL32 0009d8bc sym_2_1864
-^[0-9a-f]+ 00201803 R_MIPS_REL32 0009c7a8 sym_2_771
-^[0-9a-f]+ 00201903 R_MIPS_REL32 0009fe3c sym_2_4264
-^[0-9a-f]+ 00201a03 R_MIPS_REL32 0009fd64 sym_2_4210
-^[0-9a-f]+ 00201b03 R_MIPS_REL32 0009d850 sym_2_1837
-^[0-9a-f]+ 00201c03 R_MIPS_REL32 0009e9dc sym_2_2960
-^[0-9a-f]+ 00201d03 R_MIPS_REL32 0009e868 sym_2_2867
-^[0-9a-f]+ 00201e03 R_MIPS_REL32 000a2364 sym_2_6642
-^[0-9a-f]+ 00201f03 R_MIPS_REL32 000a1dec sym_2_6292
-^[0-9a-f]+ 00202003 R_MIPS_REL32 0009dd14 sym_2_2142
-^[0-9a-f]+ 00202103 R_MIPS_REL32 000a309c sym_2_7488
-^[0-9a-f]+ 00202203 R_MIPS_REL32 000a026c sym_2_4532
-^[0-9a-f]+ 00202303 R_MIPS_REL32 0009fca4 sym_2_4162
-^[0-9a-f]+ 00202403 R_MIPS_REL32 000a1e48 sym_2_6315
-^[0-9a-f]+ 00202503 R_MIPS_REL32 0009eff4 sym_2_3350
-^[0-9a-f]+ 00202603 R_MIPS_REL32 000a0a10 sym_2_5021
-^[0-9a-f]+ 00202703 R_MIPS_REL32 0009e3d8 sym_2_2575
-^[0-9a-f]+ 00202803 R_MIPS_REL32 0009ffa8 sym_2_4355
-^[0-9a-f]+ 00202903 R_MIPS_REL32 0009c714 sym_2_734
-^[0-9a-f]+ 00202a03 R_MIPS_REL32 000a108c sym_2_5436
-^[0-9a-f]+ 00202b03 R_MIPS_REL32 000a0ac4 sym_2_5066
-^[0-9a-f]+ 00202c03 R_MIPS_REL32 0009cd5c sym_2_1136
-^[0-9a-f]+ 00202d03 R_MIPS_REL32 0009fc00 sym_2_4121
-^[0-9a-f]+ 00202e03 R_MIPS_REL32 000a2948 sym_2_7019
-^[0-9a-f]+ 00202f03 R_MIPS_REL32 000a0320 sym_2_4577
-^[0-9a-f]+ 00203003 R_MIPS_REL32 0009e650 sym_2_2733
-^[0-9a-f]+ 00203103 R_MIPS_REL32 000a2d54 sym_2_7278
-^[0-9a-f]+ 00203203 R_MIPS_REL32 0009e344 sym_2_2538
-^[0-9a-f]+ 00203303 R_MIPS_REL32 0009e324 sym_2_2530
-^[0-9a-f]+ 00203403 R_MIPS_REL32 000a3774 sym_2_7926
-^[0-9a-f]+ 00203503 R_MIPS_REL32 0009c954 sym_2_878
-^[0-9a-f]+ 00203603 R_MIPS_REL32 0009c624 sym_2_674
-^[0-9a-f]+ 00203703 R_MIPS_REL32 0009c590 sym_2_637
-^[0-9a-f]+ 00203803 R_MIPS_REL32 0009bf1c sym_2_224
-^[0-9a-f]+ 00203903 R_MIPS_REL32 000a2418 sym_2_6687
-^[0-9a-f]+ 00203a03 R_MIPS_REL32 000a22bc sym_2_6600
-^[0-9a-f]+ 00203b03 R_MIPS_REL32 000a1d44 sym_2_6250
-^[0-9a-f]+ 00203c03 R_MIPS_REL32 000a0ef8 sym_2_5335
-^[0-9a-f]+ 00203d03 R_MIPS_REL32 000a04b0 sym_2_4677
-^[0-9a-f]+ 00203e03 R_MIPS_REL32 0009fe20 sym_2_4257
-^[0-9a-f]+ 00203f03 R_MIPS_REL32 0009f1b4 sym_2_3462
-^[0-9a-f]+ 00204003 R_MIPS_REL32 0009ebec sym_2_3092
-^[0-9a-f]+ 00204103 R_MIPS_REL32 0009ddc8 sym_2_2187
-^[0-9a-f]+ 00204203 R_MIPS_REL32 0009dc6c sym_2_2100
-^[0-9a-f]+ 00204303 R_MIPS_REL32 0009cbc8 sym_2_1035
-^[0-9a-f]+ 00204403 R_MIPS_REL32 000a2f54 sym_2_7406
-^[0-9a-f]+ 00204503 R_MIPS_REL32 000a2184 sym_2_6522
-^[0-9a-f]+ 00204603 R_MIPS_REL32 000a1bbc sym_2_6152
-^[0-9a-f]+ 00204703 R_MIPS_REL32 0009db34 sym_2_2022
-^[0-9a-f]+ 00204803 R_MIPS_REL32 000a2370 sym_2_6645
-^[0-9a-f]+ 00204903 R_MIPS_REL32 000a1df8 sym_2_6295
-^[0-9a-f]+ 00204a03 R_MIPS_REL32 000a0204 sym_2_4506
-^[0-9a-f]+ 00204b03 R_MIPS_REL32 0009fc3c sym_2_4136
-^[0-9a-f]+ 00204c03 R_MIPS_REL32 0009f9ec sym_2_3988
-^[0-9a-f]+ 00204d03 R_MIPS_REL32 0009eac0 sym_2_3017
-^[0-9a-f]+ 00204e03 R_MIPS_REL32 0009dd20 sym_2_2145
-^[0-9a-f]+ 00204f03 R_MIPS_REL32 000a2410 sym_2_6685
-^[0-9a-f]+ 00205003 R_MIPS_REL32 000a1914 sym_2_5982
-^[0-9a-f]+ 00205103 R_MIPS_REL32 0009f1bc sym_2_3464
-^[0-9a-f]+ 00205203 R_MIPS_REL32 0009ebf4 sym_2_3094
-^[0-9a-f]+ 00205303 R_MIPS_REL32 0009e338 sym_2_2535
-^[0-9a-f]+ 00205403 R_MIPS_REL32 0009ddc0 sym_2_2185
-^[0-9a-f]+ 00205503 R_MIPS_REL32 0009d5e4 sym_2_1682
-^[0-9a-f]+ 00205603 R_MIPS_REL32 000a3508 sym_2_7771
-^[0-9a-f]+ 00205703 R_MIPS_REL32 0009ed2c sym_2_3172
-^[0-9a-f]+ 00205803 R_MIPS_REL32 0009c170 sym_2_373
-^[0-9a-f]+ 00205903 R_MIPS_REL32 0009f3b8 sym_2_3591
-^[0-9a-f]+ 00205a03 R_MIPS_REL32 0009d9a8 sym_2_1923
-^[0-9a-f]+ 00205b03 R_MIPS_REL32 0009d760 sym_2_1777
-^[0-9a-f]+ 00205c03 R_MIPS_REL32 000a22c8 sym_2_6603
-^[0-9a-f]+ 00205d03 R_MIPS_REL32 000a1d50 sym_2_6253
-^[0-9a-f]+ 00205e03 R_MIPS_REL32 0009dc78 sym_2_2103
-^[0-9a-f]+ 00205f03 R_MIPS_REL32 0009e32c sym_2_2532
-^[0-9a-f]+ 00206003 R_MIPS_REL32 0009d740 sym_2_1769
-^[0-9a-f]+ 00206103 R_MIPS_REL32 000a36bc sym_2_7880
-^[0-9a-f]+ 00206203 R_MIPS_REL32 000a0814 sym_2_4894
-^[0-9a-f]+ 00206303 R_MIPS_REL32 0009c7d4 sym_2_782
-^[0-9a-f]+ 00206403 R_MIPS_REL32 000a237c sym_2_6648
-^[0-9a-f]+ 00206503 R_MIPS_REL32 000a1e04 sym_2_6298
-^[0-9a-f]+ 00206603 R_MIPS_REL32 0009dd2c sym_2_2148
-^[0-9a-f]+ 00206703 R_MIPS_REL32 0009d68c sym_2_1724
-^[0-9a-f]+ 00206803 R_MIPS_REL32 000a1b28 sym_2_6115
-^[0-9a-f]+ 00206903 R_MIPS_REL32 000a2fe8 sym_2_7443
-^[0-9a-f]+ 00206a03 R_MIPS_REL32 000a2c9c sym_2_7232
-^[0-9a-f]+ 00206b03 R_MIPS_REL32 000a1260 sym_2_5553
-^[0-9a-f]+ 00206c03 R_MIPS_REL32 0009cf30 sym_2_1253
-^[0-9a-f]+ 00206d03 R_MIPS_REL32 000a2240 sym_2_6569
-^[0-9a-f]+ 00206e03 R_MIPS_REL32 000a1c78 sym_2_6199
-^[0-9a-f]+ 00206f03 R_MIPS_REL32 0009dbf0 sym_2_2069
-^[0-9a-f]+ 00207003 R_MIPS_REL32 000a12fc sym_2_5592
-^[0-9a-f]+ 00207103 R_MIPS_REL32 0009cfcc sym_2_1292
-^[0-9a-f]+ 00207203 R_MIPS_REL32 000a32cc sym_2_7628
-^[0-9a-f]+ 00207303 R_MIPS_REL32 000a30a4 sym_2_7490
-^[0-9a-f]+ 00207403 R_MIPS_REL32 000a14a8 sym_2_5699
-^[0-9a-f]+ 00207503 R_MIPS_REL32 0009f77c sym_2_3832
-^[0-9a-f]+ 00207603 R_MIPS_REL32 0009f110 sym_2_3421
-^[0-9a-f]+ 00207703 R_MIPS_REL32 0009eb48 sym_2_3051
-^[0-9a-f]+ 00207803 R_MIPS_REL32 0009d178 sym_2_1399
-^[0-9a-f]+ 00207903 R_MIPS_REL32 0009c4f0 sym_2_597
-^[0-9a-f]+ 00207a03 R_MIPS_REL32 0009be38 sym_2_167
-^[0-9a-f]+ 00207b03 R_MIPS_REL32 000a1638 sym_2_5799
-^[0-9a-f]+ 00207c03 R_MIPS_REL32 000a13f4 sym_2_5654
-^[0-9a-f]+ 00207d03 R_MIPS_REL32 000a0fa4 sym_2_5378
-^[0-9a-f]+ 00207e03 R_MIPS_REL32 000a0e2c sym_2_5284
-^[0-9a-f]+ 00207f03 R_MIPS_REL32 0009f60c sym_2_3740
-^[0-9a-f]+ 00208003 R_MIPS_REL32 0009d308 sym_2_1499
-^[0-9a-f]+ 00208103 R_MIPS_REL32 0009d0c4 sym_2_1354
-^[0-9a-f]+ 00208203 R_MIPS_REL32 0009cc74 sym_2_1078
-^[0-9a-f]+ 00208303 R_MIPS_REL32 0009d744 sym_2_1770
-^[0-9a-f]+ 00208403 R_MIPS_REL32 000a3648 sym_2_7851
-^[0-9a-f]+ 00208503 R_MIPS_REL32 000a35b4 sym_2_7814
-^[0-9a-f]+ 00208603 R_MIPS_REL32 000a0f04 sym_2_5338
-^[0-9a-f]+ 00208703 R_MIPS_REL32 0009f128 sym_2_3427
-^[0-9a-f]+ 00208803 R_MIPS_REL32 0009eb60 sym_2_3057
-^[0-9a-f]+ 00208903 R_MIPS_REL32 0009cbd4 sym_2_1038
-^[0-9a-f]+ 00208a03 R_MIPS_REL32 000a28cc sym_2_6988
-^[0-9a-f]+ 00208b03 R_MIPS_REL32 0009e27c sym_2_2488
-^[0-9a-f]+ 00208c03 R_MIPS_REL32 000a0398 sym_2_4607
-^[0-9a-f]+ 00208d03 R_MIPS_REL32 0009d914 sym_2_1886
-^[0-9a-f]+ 00208e03 R_MIPS_REL32 0009f784 sym_2_3834
-^[0-9a-f]+ 00208f03 R_MIPS_REL32 0009f914 sym_2_3934
-^[0-9a-f]+ 00209003 R_MIPS_REL32 0009e8d8 sym_2_2895
-^[0-9a-f]+ 00209103 R_MIPS_REL32 0009eab4 sym_2_3014
-^[0-9a-f]+ 00209203 R_MIPS_REL32 000a33cc sym_2_7692
-^[0-9a-f]+ 00209303 R_MIPS_REL32 000a29dc sym_2_7056
-^[0-9a-f]+ 00209403 R_MIPS_REL32 000a1878 sym_2_5943
-^[0-9a-f]+ 00209503 R_MIPS_REL32 0009f31c sym_2_3552
-^[0-9a-f]+ 00209603 R_MIPS_REL32 0009d548 sym_2_1643
-^[0-9a-f]+ 00209703 R_MIPS_REL32 0009f868 sym_2_3891
-^[0-9a-f]+ 00209803 R_MIPS_REL32 000a1d18 sym_2_6239
-^[0-9a-f]+ 00209903 R_MIPS_REL32 0009ca2c sym_2_932
-^[0-9a-f]+ 00209a03 R_MIPS_REL32 000a3620 sym_2_7841
-^[0-9a-f]+ 00209b03 R_MIPS_REL32 000a3594 sym_2_7806
-^[0-9a-f]+ 00209c03 R_MIPS_REL32 000a1594 sym_2_5758
-^[0-9a-f]+ 00209d03 R_MIPS_REL32 0009e958 sym_2_2927
-^[0-9a-f]+ 00209e03 R_MIPS_REL32 0009d264 sym_2_1458
-^[0-9a-f]+ 00209f03 R_MIPS_REL32 000a11b4 sym_2_5510
-^[0-9a-f]+ 0020a003 R_MIPS_REL32 000a0c3c sym_2_5160
-^[0-9a-f]+ 0020a103 R_MIPS_REL32 0009ce84 sym_2_1210
-^[0-9a-f]+ 0020a203 R_MIPS_REL32 000a1438 sym_2_5671
-^[0-9a-f]+ 0020a303 R_MIPS_REL32 000a09dc sym_2_5008
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+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4229
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_600
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7902
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6229
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5831
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1531
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_289
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7888
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7724
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7670
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3102
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7397
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5960
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5605
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5235
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1660
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1305
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_979
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4019
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7865
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1953
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_343
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_306
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3188
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7032
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5570
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1270
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7321
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6883
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2383
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1860
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7767
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6774
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2274
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_489
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7862
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7827
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6851
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2351
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4215
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7518
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7101
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6516
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6146
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2016
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1756
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8125
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8096
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7821
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7761
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6101
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3601
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4808
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7550
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6557
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6187
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2057
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1910
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4731
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5730
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1430
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_480
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3711
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1764
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6327
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_441
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_406
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5853
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1827
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1553
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4670
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2644
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3538
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2701
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_511
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6803
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3668
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2303
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5694
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1394
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7849
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6560
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6190
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2060
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3584
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_948
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_277
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7377
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7169
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6937
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6933
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6528
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6158
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2437
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2433
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2028
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7391
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_867
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2565
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6564
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6194
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2064
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_862
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7354
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7164
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7127
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3307
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3125
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_825
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6992
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6957
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4754
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2492
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2457
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3382
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_500
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8184
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7747
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6832
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3772
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2332
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6997
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2497
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7539
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6862
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2362
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_938
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_992
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7534
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7595
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2755
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5787
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1487
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2807
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2803
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7180
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1988
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6006
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3639
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_334
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2675
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1872
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1942
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_604
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8035
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3266
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_558
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_128
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5455
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5085
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1155
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7946
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7909
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5108
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3796
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3768
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3996
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3725
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7983
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6591
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2091
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_178
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2827
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8129
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3378
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1901
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3400
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3335
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3030
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5777
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1477
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3447
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3077
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6728
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6640
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6358
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6290
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2228
+^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2140
00000000 00000000 R_MIPS_NONE
00000000 00000000 R_MIPS_NONE
00000000 00000000 R_MIPS_NONE
diff --git a/ld/testsuite/ld-mips-elf/rel32-n32.d b/ld/testsuite/ld-mips-elf/rel32-n32.d
index f4d24d2..cff8b36 100644
--- a/ld/testsuite/ld-mips-elf/rel32-n32.d
+++ b/ld/testsuite/ld-mips-elf/rel32-n32.d
@@ -4,12 +4,12 @@
#readelf: -x 5 -r
#ld: -shared -melf32btsmipn32
-Relocation section '.rel.dyn' at offset 0x3dc contains 2 entries:
+Relocation section '.rel.dyn' at offset 0x304 contains 2 entries:
Offset Info Type Sym.Value Sym. Name
00000000 00000000 R_MIPS_NONE
-00000400 00000003 R_MIPS_REL32
+00000330 00000003 R_MIPS_REL32
Hex dump of section '.text':
- 0x000003f0 00000000 00000000 00000000 00000000 ................
- 0x00000400 00000400 00000000 00000000 00000000 ................
- 0x00000410 00000000 00000000 00000000 00000000 ................
+ 0x00000320 00000000 00000000 00000000 00000000 ................
+ 0x00000330 00000330 00000000 00000000 00000000 ................
+ 0x00000340 00000000 00000000 00000000 00000000 ................
diff --git a/ld/testsuite/ld-mips-elf/rel32-o32.d b/ld/testsuite/ld-mips-elf/rel32-o32.d
index e04f624..982758a 100644
--- a/ld/testsuite/ld-mips-elf/rel32-o32.d
+++ b/ld/testsuite/ld-mips-elf/rel32-o32.d
@@ -4,13 +4,12 @@
#readelf: -x 6 -r
#ld: -shared -melf32btsmip
-Relocation section '.rel.dyn' at offset 0x3e0 contains 2 entries:
+Relocation section '.rel.dyn' at offset 0x31c contains 2 entries:
Offset Info Type Sym.Value Sym. Name
00000000 00000000 R_MIPS_NONE
-00000400 00000003 R_MIPS_REL32
+00000340 00000003 R_MIPS_REL32
Hex dump of section '.text':
- 0x000003f0 00000000 00000000 00000000 00000000 ................
- 0x00000400 00000400 00000000 00000000 00000000 ................
- 0x00000410 00000000 00000000 00000000 00000000 ................
- 0x00000420 00000000 00000000 00000000 00000000 ................
+ 0x00000330 00000000 00000000 00000000 00000000 ................
+ 0x00000340 00000340 00000000 00000000 00000000 ................
+ 0x00000350 00000000 00000000 00000000 00000000 ................
diff --git a/ld/testsuite/ld-mips-elf/rel64.d b/ld/testsuite/ld-mips-elf/rel64.d
index 668a067..ead15f0 100644
--- a/ld/testsuite/ld-mips-elf/rel64.d
+++ b/ld/testsuite/ld-mips-elf/rel64.d
@@ -4,16 +4,16 @@
#readelf: -x 6 -r
#ld: -shared -melf64btsmip
-Relocation section '.rel.dyn' at offset 0x5b0 contains 2 entries:
+Relocation section '.rel.dyn' at offset 0x498 contains 2 entries:
Offset Info Type Sym. Value Sym. Name
000000000000 000000000000 R_MIPS_NONE
Type2: R_MIPS_NONE
Type3: R_MIPS_NONE
-0000000005e0 000000001203 R_MIPS_REL32
+0000000004d0 000000001203 R_MIPS_REL32
Type2: R_MIPS_64
Type3: R_MIPS_NONE
Hex dump of section '.text':
- 0x000005d0 00000000 00000000 00000000 00000000 ................
- 0x000005e0 00000000 000005e0 00000000 00000000 ................
- 0x000005f0 00000000 00000000 00000000 00000000 ................
+ 0x000004c0 00000000 00000000 00000000 00000000 ................
+ 0x000004d0 00000000 000004d0 00000000 00000000 ................
+ 0x000004e0 00000000 00000000 00000000 00000000 ................