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authorAlan Modra <amodra@gmail.com>2015-04-21 19:18:24 +0930
committerAlan Modra <amodra@gmail.com>2015-04-23 09:49:19 +0930
commita27e685fa0a6480bdb07e3be359558524cec89b7 (patch)
tree770bec6f2f916fac7292a36d2ff3a9bc4c6648b2 /ld/testsuite/ld-powerpc/elfv2-2exe.d
parent19947f5fbb8f9153d9681ebc9981cc7bb056e741 (diff)
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Align .TOC. for PowerPC64
This change, with prerequisite 0e5fabeb, provides a toc base aligned to 256 bytes rather than 8 bytes. This is necessary for a minor gcc optimisation, allowing use of d-form instructions to correctly access toc-relative items larger than 8 bytes. bfd/ * elf64-ppc.c (TOC_BASE_ALIGN): Define. (ppc64_elf_next_toc_section): Align multi-got toc base. (ppc64_elf_set_toc): Likewise initial toc base and .TOC. symbol. ld/ * emulparams/elf64ppc.sh (GOT): Align. ld/testsuite/ * ld-powerpc/ambiguousv1b.d: Update for aligned .got. * ld-powerpc/defsym.d: Likewise. * ld-powerpc/elfv2-2exe.d: Likewise. * ld-powerpc/elfv2exe.d: Likewise. * ld-powerpc/elfv2so.d: Likewise. * ld-powerpc/relbrlt.d: Likewise. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.r: Likewise. * ld-powerpc/tocopt.d: Likewise. * ld-powerpc/tocopt2.d: Likewise. * ld-powerpc/tocopt3.d: Likewise. * ld-powerpc/tocopt4.d: Likewise. * ld-powerpc/tocopt5.d: Likewise.
Diffstat (limited to 'ld/testsuite/ld-powerpc/elfv2-2exe.d')
-rw-r--r--ld/testsuite/ld-powerpc/elfv2-2exe.d6
1 files changed, 3 insertions, 3 deletions
diff --git a/ld/testsuite/ld-powerpc/elfv2-2exe.d b/ld/testsuite/ld-powerpc/elfv2-2exe.d
index c8deda1..e1787d1 100644
--- a/ld/testsuite/ld-powerpc/elfv2-2exe.d
+++ b/ld/testsuite/ld-powerpc/elfv2-2exe.d
@@ -10,10 +10,10 @@ Disassembly of section \.text:
0+10000078 <f1>:
.*: (3c 40 10 01|01 10 40 3c) lis r2,4097
-.*: (38 42 80 78|78 80 42 38) addi r2,r2,-32648
+.*: (38 42 80 00|00 80 42 38) addi r2,r2,-32768
.*: (4e 80 00 20|20 00 80 4e) blr
0+10000084 <f2>:
-.*: (38 4c 7f f4|f4 7f 4c 38) addi r2,r12,32756
+.*: (38 4c 7f 7c|7c 7f 4c 38) addi r2,r12,32636
.*: (4e 80 00 20|20 00 80 4e) blr
.*: (00 00 00 00|78 00 00 10) .*
.*: (10 00 00 78|00 00 00 00) .*
@@ -34,7 +34,7 @@ Disassembly of section \.text:
0+100000cc <f3>:
.*: (3c 40 10 01|01 10 40 3c) lis r2,4097
-.*: (38 42 80 78|78 80 42 38) addi r2,r2,-32648
+.*: (38 42 80 00|00 80 42 38) addi r2,r2,-32768
.*: (4e 80 00 20|20 00 80 4e) blr
0+100000d8 <f4>: