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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 11:42:10 +0100 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 12:30:33 +0100 |
| commit | 65d1bc05e89e45b102783422c3984ed718547d5c (patch) | |
| tree | 48d1281e4669ab86e97989fbd45a09f86be134aa /ld/testsuite/ld-arm | |
| parent | 1caf72a5849abf9a717ed3e0232abf591ff933e7 (diff) | |
| download | binutils-65d1bc05e89e45b102783422c3984ed718547d5c.zip binutils-65d1bc05e89e45b102783422c3984ed718547d5c.tar.gz binutils-65d1bc05e89e45b102783422c3984ed718547d5c.tar.bz2 | |
[binutils, ARM, 9/16] New BFL instruction for Armv8.1-M Mainline
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This patch adds the BFL instruction.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entrie for bfl.
(do_t_v8_1_branch): New switch case for bfl.
(insns): New instruction for bfl.
* testsuite/gas/arm/armv8_1-m-bfl.d: New.
* testsuite/gas/arm/armv8_1-m-bfl.s: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.s: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.d: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.l: New.
* testsuite/gas/arm/armv8_1-m-bfl-rel.d: New.
* testsuite/gas/arm/armv8_1-m-bfl-rel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bfl.s: New.
* testsuite/ld-arm/bfl.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instruction bfl.
Diffstat (limited to 'ld/testsuite/ld-arm')
| -rw-r--r-- | ld/testsuite/ld-arm/arm-elf.exp | 3 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/bfl.d | 14 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/bfl.s | 19 |
3 files changed, 36 insertions, 0 deletions
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index ef3a49c..528565e 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -670,6 +670,9 @@ set armeabitests_nonacl { {"Armv8.1-M Mainline BF" "-r -Ttext 0x1000 --section-start .foo=0x1001000" "" "-march=armv8.1-m.main" {bf.s} {{objdump -dr bf.d}} "bf"} + {"Armv8.1-M Mainline BFL" "-r -Ttext 0x1000 --section-start .foo=0x1001000" "" "-march=armv8.1-m.main" {bfl.s} + {{objdump -dr bfl.d}} + "bfl"} {"R_ARM_THM_JUMP24 Relocation veneers: Short 1" "--no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000" "" diff --git a/ld/testsuite/ld-arm/bfl.d b/ld/testsuite/ld-arm/bfl.d new file mode 100644 index 0000000..dcf3202 --- /dev/null +++ b/ld/testsuite/ld-arm/bfl.d @@ -0,0 +1,14 @@ + +.*: file format elf32-.*arm + + +Disassembly of section .text: + +00001000 <_start>: + 1000: f0ff c7ff bfl 2, 1001000 <bar> + 1000: R_ARM_THM_BF18 bar + +Disassembly of section .foo: + +01001000 <bar>: + 1001000: 4770 bx lr diff --git a/ld/testsuite/ld-arm/bfl.s b/ld/testsuite/ld-arm/bfl.s new file mode 100644 index 0000000..e9fb0a70 --- /dev/null +++ b/ld/testsuite/ld-arm/bfl.s @@ -0,0 +1,19 @@ + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bfl 2, bar + +@ We will place the section .foo at 0x1001000. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + |