diff options
| author | Luis Machado <luis.machado@arm.com> | 2022-09-22 12:53:33 +0100 |
|---|---|---|
| committer | Luis Machado <luis.machado@arm.com> | 2022-10-04 09:14:34 +0100 |
| commit | f4b581f2d1ac69c27a06a328e11763b44544aadb (patch) | |
| tree | 34c8a3e9eb8ce18427f7691260b2817fc55602a3 /intl | |
| parent | 758dd750bc6d752b290aefdd62048ca2ea5899d4 (diff) | |
| download | binutils-f4b581f2d1ac69c27a06a328e11763b44544aadb.zip binutils-f4b581f2d1ac69c27a06a328e11763b44544aadb.tar.gz binutils-f4b581f2d1ac69c27a06a328e11763b44544aadb.tar.bz2 | |
[AArch64] Update FPSR/FPCR fields for FPU and SVE
I noticed some missing flags/fields from FPSR and FPCR registers in
both the FPU and SVE target descriptions.
This patch adds those and makes the SVE versions of FPSR and FPCR
use the proper flags/bitfields types.
Diffstat (limited to 'intl')
0 files changed, 0 insertions, 0 deletions