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| author | Jiawei <jiawei@iscas.ac.cn> | 2024-09-24 19:16:25 +0800 |
|---|---|---|
| committer | Nelson Chu <nelson@rivosinc.com> | 2024-09-25 09:28:27 +0800 |
| commit | f0bdf8c1691c9509eaebab323754e0530d4ff5d7 (patch) | |
| tree | c14d68a626b3208a5c71e4ab122dd44c18e81686 /include | |
| parent | 85536552c12e0225c70d93383eb0368bb3757e2e (diff) | |
| download | binutils-f0bdf8c1691c9509eaebab323754e0530d4ff5d7.zip binutils-f0bdf8c1691c9509eaebab323754e0530d4ff5d7.tar.gz binutils-f0bdf8c1691c9509eaebab323754e0530d4ff5d7.tar.bz2 | |
RISC-V: Add Smrnmi extension csrs.
This patch support Smrnmi extension[1],
The csrs address can be find in[2].
[1] https://github.com/riscv/riscv-isa-manual/commit/35eb3948bf0b87c83fab5a7238bd68b6211faf62
[2] https://github.com/riscv/riscv-isa-manual/blob/smrnmi-1.0/src/priv-csrs.adoc
bfd/ChangeLog:
* elfxx-riscv.c: New extension.
gas/ChangeLog:
* NEWS: Add Smrnmi extension support.
* config/tc-riscv.c (enum riscv_csr_class): New extension class.
(riscv_csr_address): Ditto.
* testsuite/gas/riscv/csr-version-1p10.d: New csrs.
* testsuite/gas/riscv/csr-version-1p10.l: Ditto.
* testsuite/gas/riscv/csr-version-1p11.d: Ditto.
* testsuite/gas/riscv/csr-version-1p11.l: Ditto.
* testsuite/gas/riscv/csr-version-1p12.d: Ditto.
* testsuite/gas/riscv/csr-version-1p12.l: Ditto.
* testsuite/gas/riscv/csr.s: Ditto.
* testsuite/gas/riscv/march-help.l: New extension.
include/ChangeLog:
* opcode/riscv-opc.h (CSR_MNSCRATCH): New csr.
(CSR_MNEPC): Ditto.
(CSR_MNCAUSE): Ditto.
(CSR_MNSTATUS): Ditto.
(DECLARE_CSR): New csr declarations.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/riscv-opc.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h index 73ee811..2209e1a 100644 --- a/include/opcode/riscv-opc.h +++ b/include/opcode/riscv-opc.h @@ -4074,6 +4074,11 @@ #define CSR_MINSTRETCFG 0x322 #define CSR_MCYCLECFGH 0x721 #define CSR_MINSTRETCFGH 0x722 +/* Smrnmi extension. */ +#define CSR_MNSCRATCH 0x740 +#define CSR_MNEPC 0x741 +#define CSR_MNCAUSE 0x742 +#define CSR_MNSTATUS 0x744 /* Smstateen extension */ #define CSR_MSTATEEN0 0x30c #define CSR_MSTATEEN1 0x30d @@ -5172,6 +5177,11 @@ DECLARE_CSR(mcyclecfg, CSR_MCYCLECFG, CSR_CLASS_SMCNTRPMF, PRIV_SPEC_CLASS_1P10, DECLARE_CSR(minstretcfg, CSR_MINSTRETCFG, CSR_CLASS_SMCNTRPMF, PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT) DECLARE_CSR(mcyclecfgh, CSR_MCYCLECFGH, CSR_CLASS_SMCNTRPMF_32, PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT) DECLARE_CSR(minstretcfgh, CSR_MINSTRETCFGH, CSR_CLASS_SMCNTRPMF_32, PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT) +/* Smrnmi extensions. */ +DECLARE_CSR(mnepc, CSR_MNEPC, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) +DECLARE_CSR(mncause, CSR_MNCAUSE, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) +DECLARE_CSR(mnscratch, CSR_MNSCRATCH, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) +DECLARE_CSR(mnstatus, CSR_MNSTATUS, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) /* Smstateen/Ssstateen extensions. */ DECLARE_CSR(mstateen0, CSR_MSTATEEN0, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) DECLARE_CSR(mstateen1, CSR_MSTATEEN1, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) |