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| author | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2023-11-02 13:07:29 +0000 |
|---|---|---|
| committer | srinath <srinath.parvathaneni@arm.com> | 2023-11-02 13:09:26 +0000 |
| commit | c58f84d899b58822c57a780161a173f32b4f6abf (patch) | |
| tree | d590029a225032ef25aa18bdf8c10f615fb7e8d3 /include | |
| parent | f985c2512aee1c4440998db62d6aea98c737b3ef (diff) | |
| download | binutils-c58f84d899b58822c57a780161a173f32b4f6abf.zip binutils-c58f84d899b58822c57a780161a173f32b4f6abf.tar.gz binutils-c58f84d899b58822c57a780161a173f32b4f6abf.tar.bz2 | |
aarch64: Add support for GCSB DSYNC instruction.
This patch adds support for Guarded control stack data synchronization
instruction (GCSB DSYNC). This instruction is allocated to existing
HINT space and uses the HINT number 19 and to match this an entry is
added to the aarch64_hint_options array.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/aarch64.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 9d0b553..72d8ec2 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -517,6 +517,7 @@ enum aarch64_opnd AARCH64_OPND_PRFOP, /* Prefetch operation. */ AARCH64_OPND_RPRFMOP, /* Range prefetch operation. */ AARCH64_OPND_BARRIER_PSB, /* Barrier operand for PSB. */ + AARCH64_OPND_BARRIER_GCSB, /* Barrier operand for GCSB. */ AARCH64_OPND_BTI_TARGET, /* BTI {<target>}. */ AARCH64_OPND_SVE_ADDR_RI_S4x16, /* SVE [<Xn|SP>, #<simm4>*16]. */ AARCH64_OPND_SVE_ADDR_RI_S4x32, /* SVE [<Xn|SP>, #<simm4>*32]. */ @@ -1477,6 +1478,7 @@ struct aarch64_inst /* Defining the HINT #imm values for the aarch64_hint_options. */ #define HINT_OPD_CSYNC 0x11 +#define HINT_OPD_DSYNC 0x13 #define HINT_OPD_C 0x22 #define HINT_OPD_J 0x24 #define HINT_OPD_JC 0x26 |