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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2020-01-16 13:50:52 +0000 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2020-01-16 14:33:01 +0000 |
| commit | 2da2eaf4ce299c84c5a1f1bc6f7944266cb36d6e (patch) | |
| tree | 19d34c42caae23cf49721b5246304d9a7a34d5cd /include | |
| parent | 6d0be74bfa2138a204a7954c7b6a6c8a1b63ba77 (diff) | |
| download | binutils-2da2eaf4ce299c84c5a1f1bc6f7944266cb36d6e.zip binutils-2da2eaf4ce299c84c5a1f1bc6f7944266cb36d6e.tar.gz binutils-2da2eaf4ce299c84c5a1f1bc6f7944266cb36d6e.tar.bz2 | |
[binutils][arm] PR25376 Change MVE into a CORE_HIGH feature
This patch moves MVE feature bits into the CORE_HIGH section. This makes sure
.fpu and -mfpu does not reset the bits set by MVE. This is important because
.fpu has no option to "set" these same bits and thus, mimic'ing GCC, we choose
to define MVE as an architecture extension rather than put it together with
other the legacy fpu features.
This will enable the following behavior:
.arch armv8.1-m.main
.arch mve
.fpu fpv5-sp-d16 #does not disable mve.
vadd.i32 q0, q1, q2
This patch also makes sure MVE is not taken into account during auto-detect.
This was already the case, but because we moved the MVE bits to the
architecture feature space we must make sure ARM_ANY does not include MVE.
gas/ChangeLog:
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR 25376
* config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
(armv8_1m_main_ext_table): Use CORE_HIGH for mve.
* testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
* testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
* testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
* testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
include/ChangeLog:
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR 25376
* opcodes/arm.h (FPU_MVE, FPU_MVE_FPU): Move these features to...
(ARM_EXT2_MVE, ARM_EXT2_MVE_FP): ... the CORE_HIGH space.
(ARM_ANY): Redefine to not include any MVE bits.
(ARM_FEATURE_ALL): Removed.
opcodes/ChangeLog:
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR 25376
* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
(neon_opcodes): Likewise.
(select_arm_features): Make sure we enable MVE bits when selecting
armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
any architecture.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 8 | ||||
| -rw-r--r-- | include/opcode/arm.h | 7 |
2 files changed, 11 insertions, 4 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index f6ad34d..9706da7 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,11 @@ +2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR 25376 + * opcodes/arm.h (FPU_MVE, FPU_MVE_FPU): Move these features to... + (ARM_EXT2_MVE, ARM_EXT2_MVE_FP): ... the CORE_HIGH space. + (ARM_ANY): Redefine to not include any MVE bits. + (ARM_FEATURE_ALL): Removed. + 2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> * opcode/msp430.h (enum msp430_expp_e): New. diff --git a/include/opcode/arm.h b/include/opcode/arm.h index 7b0f180..6d8c3d0 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -77,6 +77,8 @@ #define ARM_EXT2_BF16 0x00020000 /* ARMv8 bfloat16. */ #define ARM_EXT2_I8MM 0x00040000 /* ARMv8.6A i8mm. */ #define ARM_EXT2_CRC 0x00080000 /* ARMv8 CRC32 */ +#define ARM_EXT2_MVE 0x00100000 /* MVE Integer extension. */ +#define ARM_EXT2_MVE_FP 0x00200000 /* MVE Floating Point extension. */ /* Co-processor space extensions. */ #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */ @@ -107,8 +109,6 @@ #define FPU_VFP_EXT_ARMV8xD 0x00002000 /* Single-precision FP for ARMv8. */ #define FPU_NEON_EXT_RDMA 0x00001000 /* v8.1 Adv.SIMD extensions. */ #define FPU_NEON_EXT_DOTPROD 0x00000800 /* Dot Product extension. */ -#define FPU_MVE 0x00000400 /* MVE Integer extension. */ -#define FPU_MVE_FP 0x00000200 /* MVE Floating Point extension. */ /* Architectures are the sum of the base and extensions. The ARM ARM (rev E) defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T, @@ -372,9 +372,8 @@ /* Some useful combinations: */ #define ARM_ARCH_NONE ARM_FEATURE_LOW (0, 0) #define FPU_NONE ARM_FEATURE_LOW (0, 0) -#define ARM_ANY ARM_FEATURE (-1, -1, 0) /* Any basic core. */ +#define ARM_ANY ARM_FEATURE (-1, -1 & ~ (ARM_EXT2_MVE | ARM_EXT2_MVE_FP), 0) /* Any basic core. */ #define FPU_ANY ARM_FEATURE_COPROC (-1) /* Any FPU. */ -#define ARM_FEATURE_ALL ARM_FEATURE (-1, -1, -1)/* All CPU and FPU features. */ #define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK) /* Extensions containing some Thumb-2 instructions. If any is present, Thumb ISA is Thumb-2. */ |