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author | Alan Hayward <alan.hayward@arm.com> | 2018-06-20 18:19:05 +0100 |
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committer | Alan Hayward <alan.hayward@arm.com> | 2018-06-22 16:26:02 +0100 |
commit | 8e7767e3f782c46451a548d708f5582669d7a6d7 (patch) | |
tree | a406ee831dad6254abe28f61caeba1d63be514ab /gold/layout.h | |
parent | 514cd3a0f589fa48ca7bc9504c36436c0cbefcb2 (diff) | |
download | binutils-8e7767e3f782c46451a548d708f5582669d7a6d7.zip binutils-8e7767e3f782c46451a548d708f5582669d7a6d7.tar.gz binutils-8e7767e3f782c46451a548d708f5582669d7a6d7.tar.bz2 |
Use partial register read/writes in transfer_regset
This avoids assert failures when the register is bigger than the
slot size. This happens on Aarch64 when truncating Z registers
into an fpsimd structure. This can be triggered by running
gdb command "generate-core-file".
Also, when the register is smaller then the slot size, then
zero pad when writing to the slot, and truncate when writing
to the regcache. This happens on Aarch64 with the CPSR register.
Continue to ensure registers are invalidated when both buffers
are null.
gdb/
* regcache.c (readable_regcache::read_part): Fix asserts.
(reg_buffer::raw_collect_part): New function.
(regcache::write_part): Fix asserts.
(reg_buffer::raw_supply_part): New function.
(regcache::transfer_regset_register): New helper function.
(regcache::transfer_regset): Call new functions.
(regcache_supply_regset): Use gdb_byte*.
(regcache::supply_regset): Likewise.
(regcache_collect_regset): Likewise.
(regcache::collect_regset): Likewise.
* regcache.h (reg_buffer::raw_collect_part): New declaration.
(reg_buffer::raw_supply_part): Likewise.
(regcache::transfer_regset_register): Likewise.
(regcache::transfer_regset): Use gdb_byte*.
Diffstat (limited to 'gold/layout.h')
0 files changed, 0 insertions, 0 deletions