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authorChristoph Müllner <christoph.muellner@vrull.eu>2022-11-13 16:59:21 +0100
committerNelson Chu <nelson@rivosinc.com>2022-11-17 16:43:55 +0800
commit01804a098dea7d08857eee82bcaad04676dd8ea1 (patch)
tree69ec5662e29df0e9632fca8f788acb0383440ef2 /gdb
parent4a3bc79bf4c0e89c876c930a1e95a02213277460 (diff)
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RISC-V: Add T-Head Int vendor extension
This patch adds the XTheadInt extension, which provides interrupt stack management instructions. The XTheadFmv extension is documented in the RISC-V toolchain contentions: https://github.com/riscv-non-isa/riscv-toolchain-conventions Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
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