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authorAlice Carlotti <alice.carlotti@arm.com>2025-10-02 18:57:58 +0100
committerAlice Carlotti <alice.carlotti@arm.com>2025-10-10 01:14:06 +0100
commitec159031adedc0dc7c1e56e4bf9688bfcad3a319 (patch)
tree1a42ee15a0f07aa621b7787215da3a9b7a9c8e2a /gdb/testsuite/gdb.python/py-cmd-exception.py
parent901220f03e1938eb30c09862f22361ac011ce46d (diff)
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aarch64: Extend aarch64_field to support constants
Many instructions have constraints on the range of registers they can use. This means that some bits in the register number are fixed, and therefore aren't mapped to a field in the instruction encoding. Currently we use various adhoc rules to handle these fixed bits, but this doesn't handle all cases and we often have to write new code to support new combinations of permitted registers. This patch allows these constant bits to instead be specified in the same structure used to represent instruction fields. Uses of the new constant fields will be introduced in subsequent patches.
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