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| author | Alice Carlotti <alice.carlotti@arm.com> | 2025-04-04 19:23:11 +0100 |
|---|---|---|
| committer | Alice Carlotti <alice.carlotti@arm.com> | 2025-05-13 17:57:30 +0100 |
| commit | 1c87a0ffc299a5e74f43b6cbee3e81769516d30f (patch) | |
| tree | 3dfd8bcf2c481332aca6ff88699b82b3b830dbd0 /gdb/python/python.c | |
| parent | ef8bee09ef09230e4247ea962698bf5a0b4892cc (diff) | |
| download | binutils-1c87a0ffc299a5e74f43b6cbee3e81769516d30f.zip binutils-1c87a0ffc299a5e74f43b6cbee3e81769516d30f.tar.gz binutils-1c87a0ffc299a5e74f43b6cbee3e81769516d30f.tar.bz2 | |
aarch64: Replace incorrect comment
The comment explaining the placement of the cfinv entry before the
generic msr entry in the opcode table was incorrect. The issue is
unrelated to the all ones bitmask for cfinv, and is actually due the
large number of architectural aliases of the msr instruction.
Diffstat (limited to 'gdb/python/python.c')
0 files changed, 0 insertions, 0 deletions