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| author | Simon Marchi <simon.marchi@efficios.com> | 2024-07-31 14:06:12 -0400 |
|---|---|---|
| committer | Simon Marchi <simon.marchi@polymtl.ca> | 2024-08-02 16:54:25 -0400 |
| commit | d724d71ad22b9d4b8e659d9c44cce8b724f4f7f5 (patch) | |
| tree | 0f976ca65d4bb650f182b3c3e24aa0876b06a1c6 /gdb/nat | |
| parent | 6ce1ea97af20b9e618c524aa719e70c17dacda74 (diff) | |
| download | binutils-d724d71ad22b9d4b8e659d9c44cce8b724f4f7f5.zip binutils-d724d71ad22b9d4b8e659d9c44cce8b724f4f7f5.tar.gz binutils-d724d71ad22b9d4b8e659d9c44cce8b724f4f7f5.tar.bz2 | |
gdb: remove uses of VLA
Remove uses of VLAs, replace with gdb::byte_vector. There might be more
in files that I can't compile, but it's difficult to tell without
actually compiling on all platforms.
Many thanks to the Linaro pre-commit CI for helping find some problems
with an earlier iteration of this patch.
Change-Id: I3e5e34fcac51f3e6b732bb801c77944e010b162e
Reviewed-by: Keith Seitz <keiths@redhat.com>
Diffstat (limited to 'gdb/nat')
| -rw-r--r-- | gdb/nat/aarch64-mte-linux-ptrace.c | 4 | ||||
| -rw-r--r-- | gdb/nat/aarch64-scalable-linux-ptrace.c | 11 |
2 files changed, 6 insertions, 9 deletions
diff --git a/gdb/nat/aarch64-mte-linux-ptrace.c b/gdb/nat/aarch64-mte-linux-ptrace.c index c2e7029..f215588 100644 --- a/gdb/nat/aarch64-mte-linux-ptrace.c +++ b/gdb/nat/aarch64-mte-linux-ptrace.c @@ -119,10 +119,10 @@ aarch64_mte_fetch_memtags (int tid, CORE_ADDR address, size_t len, if (ntags == 0) return true; - gdb_byte tagbuf[ntags]; + gdb::byte_vector tagbuf (ntags); struct iovec iovec; - iovec.iov_base = tagbuf; + iovec.iov_base = tagbuf.data (); iovec.iov_len = ntags; tags.clear (); diff --git a/gdb/nat/aarch64-scalable-linux-ptrace.c b/gdb/nat/aarch64-scalable-linux-ptrace.c index 81bb8ea..0f1bedf 100644 --- a/gdb/nat/aarch64-scalable-linux-ptrace.c +++ b/gdb/nat/aarch64-scalable-linux-ptrace.c @@ -920,8 +920,7 @@ aarch64_za_regs_copy_to_reg_buf (int tid, struct reg_buffer_common *reg_buf, else { size_t za_bytes = header->vl * header->vl; - gdb_byte za_zeroed[za_bytes]; - memset (za_zeroed, 0, za_bytes); + gdb::byte_vector za_zeroed (za_bytes, 0); reg_buf->raw_supply (za_regnum, za_zeroed); } @@ -994,8 +993,7 @@ aarch64_za_regs_copy_from_reg_buf (int tid, bool has_za_state = aarch64_has_za_state (tid); size_t za_bytes = sve_vl_from_vg (old_svg) * sve_vl_from_vg (old_svg); - gdb_byte za_zeroed[za_bytes]; - memset (za_zeroed, 0, za_bytes); + gdb::byte_vector za_zeroed (za_bytes, 0); /* If the streaming vector length changed, zero out the contents of ZA in the register cache. Otherwise, we will need to update the ZA contents @@ -1007,8 +1005,7 @@ aarch64_za_regs_copy_from_reg_buf (int tid, /* When we update svg, we don't automatically initialize the ZA buffer. If we have no ZA state and the ZA register contents in the register cache are zero, just return and leave the ZA register cache contents as zero. */ - if (!has_za_state - && reg_buf->raw_compare (za_regnum, za_zeroed, 0)) + if (!has_za_state && reg_buf->raw_compare (za_regnum, za_zeroed.data (), 0)) { /* No ZA state in the thread or in the register cache. This was likely just an adjustment of the streaming vector length. Let this fall @@ -1020,7 +1017,7 @@ aarch64_za_regs_copy_from_reg_buf (int tid, need to initialize the ZA data through ptrace. First we initialize all the bytes of ZA to zero. */ if (!has_za_state - && !reg_buf->raw_compare (za_regnum, za_zeroed, 0)) + && !reg_buf->raw_compare (za_regnum, za_zeroed.data (), 0)) aarch64_initialize_za_regset (tid); /* From this point onwards, it is assumed we have a ZA payload in |