* exec.c (xfer_memory): Add attrib argument.

* infptrace.c (child_xfer_memory): Likewise.
* monitor.c (monitor_xfer_memory): Likewise.
* remote-adapt.c (adapt_xfer_inferior_memory): Likewise.
* remote-array.c (array_xfer_memory): Likewise.
* remote-bug.c (bug_xfer_memory): Likewise.
* remote-e7000.c (e7000_xfer_inferior_memory): Likewise.
* remote-eb.c (eb_xfer_inferior_memory): Likewise.
* remote-es.c (es1800_xfer_inferior_memory): Likewise.
* remote-mips.c (mips_xfer_memory): Likewise.
* remote-mm.c (mm_xfer_inferior_memory): Likewise.
* remote-nindy.c (nindy_xfer_inferior_memory): Likewise.
* remote-os9k.c (rombug_xfer_inferior_memory): Likewise.
* remote-rdi.c (arm_rdi_xfer_memory): Likewise.
* remote-rdp.c (remote_rdp_xfer_inferior_memory): Likewise.
* remote-sds.c (sds_xfer_memory): Likewise.
* remote-sim.c (gdbsim_xfer_inferior_memory): Likewise.
* remote-st.c (st2000_xfer_inferior_memory): Likewise.
* remote-udi.c (udi_xfer_inferior_memory): Likewise.
* remote-vx.c (vx_xfer_memory): Likewise.
* remote.c (remote_xfer_memory): Likewise.
* target.c (debug_to_xfer_memory, do_xfer_memory): Likewise.
* target.h (child_xfer_memory, do_xfer_memory, xfer_memory): Likewise.

* target.h (#include "memattr.h"): Added.
(target_ops.to_xfer_memory): Add attrib argument.

* wince.c (_initialize_inftarg): Removed call to set_dcache_state.
* dcache.h (set_dcache_state): Removed declaration.
* dcache.c (set_dcache_state): Removed definition

* dcache.c: Update module comment, as dcache is now enabled and
disabled with memory region attributes instead of by the global
variable "remotecache".  Add comment describing the interaction
between dcache and memory region attributes.
(dcache_xfer_memory): Add comment describing benefits of moving
cache writeback to a higher level.
(dcache_struct): Removed cache_has_stuff field.  This was used to
record whether the cache had been accessed in order to invalidate
it when it was disabled.  However, this is not needed because the
cache is write through and the code that enables, disables, and
deletes memory regions invalidate the cache.  Add comment which
suggests that we could be more selective and only invalidate those
cache lines containing data from those memory regions.
(dcache_invalidate): Updated.
(dcache_xfer_memory): Updated.

(dcache_alloc): Don't abort() if dcache_enabled_p is clear.
(dcache_xfer_memory): Removed code that called do_xfer_memory() to
perform a uncached transfer if dcache_enabled_p was clear.  This
function is now only called if caching is enabled for the memory
region.
(dcache_info): Always print cache info.

* target.c (do_xfer_memory): Add attrib argument.
(target_xfer_memory, target_xfer_memory_partial): Break transfer
into chunks defined by memory regions, pass region attributes to
do_xfer_memory().
* dcache.c (dcache_read_line, dcache_write_line): Likewise.

* Makefile.in (SFILES): Add memattr.c.
(COMMON_OBS): Add memattr.o.
(dcache.o): Add target.h to dependencies.
* memattr.c: New file.
* memattr.h: Likewise.

2 files changed, 137 insertions, 1 deletions

diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog
index 91dd4ae..f98d81b 100644
--- a/gdb/doc/ChangeLog
+++ b/gdb/doc/ChangeLog
@@ -1,3 +1,7 @@
+2001-01-23  J.T. Conklin  <jtc@redback.com>
+
+	* gdb.texinfo (Memory region attributes): New manual section.
+
 2001-01-04  Nicholas Duffek  <nsd@redhat.com>
 
 	* gdbint.texinfo (POP_FRAME): Document use by return_command.
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index aa92565..72f50d9 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -1,5 +1,5 @@
 \input texinfo      @c -*-texinfo-*-
-@c Copyright 1988-2000
+@c Copyright 1988-2001
 @c Free Software Foundation, Inc.
 @c
 @c %**start of header
@@ -4347,6 +4347,7 @@ Table}.
 * Convenience Vars::            Convenience variables
 * Registers::                   Registers
 * Floating Point Hardware::     Floating point hardware
+* Memory Region Attributes::    Memory region attributes
 @end menu
 
 @node Expressions
@@ -5504,6 +5505,137 @@ floating point chip.  Currently, @samp{info float} is supported on
 the ARM and x86 machines.
 @end table
 
+@node Memory Region Attributes
+@section Memory Region Attributes 
+@cindex memory region attributes
+
+@dfn{Memory region attributes} allow you to describe special handling 
+required by regions of your target's memory.  @value{GDBN} uses attributes 
+to determine whether to allow certain types of memory accesses; whether to
+use specific width accesses; and whether to cache target memory.
+
+Defined memory regions can be individually enabled and disabled.  When a
+memory region is disabled, @value{GDBN} uses the default attributes when
+accessing memory in that region.  Similarly, if no memory regions have
+been defined, @value{GDBN} uses the default attributes when accessing
+all memory.
+
+When a memory region is defined, it is given a number to identify it; 
+to enable, disable, or remove a memory region, you specify that number.
+
+@table @code
+@kindex mem
+@item mem @var{address1} @var{address1} @var{attributes}@dots{}
+Define memory region bounded by @var{address1} and @var{address2}
+with attributes @var{attributes}@dots{}.
+
+@kindex delete mem
+@item delete mem @var{nums}@dots{}
+Remove memory region numbers @var{nums}.
+
+@kindex disable mem
+@item disable mem @var{nums}@dots{}
+Disable memory region numbers @var{nums}.
+A disabled memory region is not forgotten.  
+It may be enabled again later.
+
+@kindex enable mem
+@item enable mem @var{nums}@dots{}
+Enable memory region numbers @var{nums}.
+
+@kindex info mem
+@item info mem
+Print a table of all defined memory regions, with the following columns
+for each region.
+
+@table @emph
+@item Memory Region Number
+@item Enabled or Disabled.
+Enabled memory regions are marked with @samp{y}.  
+Disabled memory regions are marked with @samp{n}.
+
+@item Lo Address
+The address defining the inclusive lower bound of the memory region.
+
+@item Hi Address
+The address defining the exclusive upper bound of the memory region.
+
+@item Attributes
+The list of attributes set for this memory region.
+@end table
+@end table
+
+
+@subsection Attributes
+
+@subsubsection Memory Access Mode 
+The access mode attributes set whether @value{GDBN} may make read or
+write accesses to a memory region.
+
+While these attributes prevent @value{GDBN} from performing invalid
+memory accesses, they do nothing to prevent the target system, I/O DMA,
+etc. from accessing memory.
+
+@table @code
+@item ro
+Memory is read only.
+@item wo
+Memory is write only.
+@item rw
+Memory is read/write (default).
+@end table
+
+@subsubsection Memory Access Size
+The acccess size attributes tells @value{GDBN} to use specific sized
+accesses in the memory region.  Often memory mapped device registers
+require specific sized accesses.  If no access size attribute is
+specified, @value{GDBN} may use accesses of any size.
+
+@table @code
+@item 8
+Use 8 bit memory accesses.
+@item 16
+Use 16 bit memory accesses.
+@item 32
+Use 32 bit memory accesses.
+@item 64
+Use 64 bit memory accesses.
+@end table
+
+@c @subsubsection Hardware/Software Breakpoints
+@c The hardware/software breakpoint attributes set whether @value{GDBN}
+@c will use hardware or software breakpoints for the internal breakpoints
+@c used by the step, next, finish, until, etc. commands.
+@c
+@c @table @code
+@c @item hwbreak
+@c Always use hardware breakpoints 
+@c @item swbreak (default)
+@c @end table
+
+@subsubsection Data Cache
+The data cache attributes set whether @value{GDBN} will cache target
+memory.  While this generally improves performance by reducing debug
+protocol overhead, it can lead to incorrect results because @value{GDBN}
+does not know about volatile variables or memory mapped device
+registers.
+
+@table @code
+@item cache
+Enable @value{GDBN} to cache target memory. 
+@item nocache (default)
+Disable @value{GDBN} from caching target memory.
+@end table
+
+@c @subsubsection Memory Write Verification
+@c The memory write verification attributes set whether @value{GDBN} 
+@c will re-reads data after each write to verify the write was successful.
+@c
+@c @table @code
+@c @item verify
+@c @item noverify (default)
+@c @end table
+
 @node Languages
 @chapter Using @value{GDBN} with Different Languages
 @cindex languages