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author | David Edelsohn <dje.gcc@gmail.com> | 1997-09-09 23:47:12 +0000 |
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committer | David Edelsohn <dje.gcc@gmail.com> | 1997-09-09 23:47:12 +0000 |
commit | 8f5eb36c1374e92dea4f8a43448090b41c1a3319 (patch) | |
tree | a70a48382e6a7ecbb057451e3f2df07759015646 /gdb/config/arc/tm-arc.h | |
parent | 2f36d00478524ed4081b20db411c94f8b7842c13 (diff) | |
download | binutils-8f5eb36c1374e92dea4f8a43448090b41c1a3319.zip binutils-8f5eb36c1374e92dea4f8a43448090b41c1a3319.tar.gz binutils-8f5eb36c1374e92dea4f8a43448090b41c1a3319.tar.bz2 |
Misc. changes I had lying around.
Diffstat (limited to 'gdb/config/arc/tm-arc.h')
-rw-r--r-- | gdb/config/arc/tm-arc.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/gdb/config/arc/tm-arc.h b/gdb/config/arc/tm-arc.h index c6cfb71..e4b693b 100644 --- a/gdb/config/arc/tm-arc.h +++ b/gdb/config/arc/tm-arc.h @@ -53,14 +53,19 @@ extern CORE_ADDR skip_prologue PARAMS ((CORE_ADDR, int)); #define BIG_BREAKPOINT { 0x12, 0x1f, 0xff, 0xff } #define LITTLE_BREAKPOINT { 0xff, 0xff, 0x1f, 0x12 } -/* ??? This value may eventually be correct (if/when proper breakpoints - are added). Until then no value is correct so leave as is and cope. */ +/* Given the exposed pipeline, there isn't any one correct value. + However, this value must be 4. GDB can't handle any other value (other than + zero). See for example infrun.c: + "prev_pc != stop_pc - DECR_PC_AFTER_BREAK" */ +/* FIXME */ #define DECR_PC_AFTER_BREAK 8 /* We don't have a reliable single step facility. ??? We do have a cycle single step facility, but that won't work. */ #define NO_SINGLE_STEP +/* FIXME: Need to set STEP_SKIPS_DELAY. */ + /* Given a pc value as defined by the hardware, return the real address. Remember that on the ARC blink contains that status register which includes PC + flags (so we have to mask out the flags). */ |