sme: Enable SME registers and pseudo-registers

The SME (Scalable Matrix Extension) [1] exposes a new matrix register ZA with
variable sizes.  It also exposes a new mode called streaming mode.

Similarly to SVE, the ZA register size is dictated by a vector length, but the
SME vector length is called streaming vetor length. The total size for
ZA in a given moment is svl x svl.

In streaming mode, the SVE registers have their sizes based on svl rather than
the regular vector length (vl).

The feature detection is controlled by the HWCAP2_SME bit, but actual support
should be validated by attempting a ptrace call for one of the new register
sets: NT_ARM_ZA and NT_ARM_SSVE.

Due to its large size, the ZA register is exposed as a vector of bytes, but we
introduce a number of pseudo-registers that gives various different views
into the ZA contents. These can be arranged in a couple categories: tiles and
tile slices.

Tiles are matrices the same size or smaller than ZA.  Tile slices are vectors
which map to ZA's rows/columns in different ways.

A new dynamic target description is provided containing the ZA register, the SVG
register and the SVCR register.  The size of ZA, like the SVE vector registers,
is based on the vector length register SVG (VG for SVE).

This patch enables SME register support for gdb.

[1] https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/scalable-matrix-extension-armv9-a-architecture

Co-Authored-By: Ezra Sitorus <ezra.sitorus@arm.com>
Reviewed-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org>

4 files changed, 117 insertions, 4 deletions

diff --git a/gdb/arch/aarch64-scalable-linux.c b/gdb/arch/aarch64-scalable-linux.c
new file mode 100644
index 0000000..3803acf
--- /dev/null
+++ b/gdb/arch/aarch64-scalable-linux.c
@@ -0,0 +1,21 @@
+/* Common Linux arch-specific functionality for AArch64 scalable
+   extensions: SVE and SME.
+
+   Copyright (C) 2023 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include "arch/aarch64-scalable-linux.h"
diff --git a/gdb/arch/aarch64-scalable-linux.h b/gdb/arch/aarch64-scalable-linux.h
new file mode 100644
index 0000000..df17410
--- /dev/null
+++ b/gdb/arch/aarch64-scalable-linux.h
@@ -0,0 +1,38 @@
+/* Common AArch64 Linux arch-specific definitions for the scalable
+   extensions: SVE and SME.
+
+   Copyright (C) 2023 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifndef ARCH_AARCH64_SCALABLE_LINUX_H
+#define ARCH_AARCH64_SCALABLE_LINUX_H
+
+#include "gdbsupport/common-defs.h"
+
+/* Feature check for Scalable Matrix Extension.  */
+#ifndef HWCAP2_SME
+#define HWCAP2_SME (1 << 23)
+#endif
+
+/* Streaming mode enabled/disabled bit.  */
+#define SVCR_SM_BIT (1 << 0)
+/* ZA enabled/disabled bit.  */
+#define SVCR_ZA_BIT (1 << 1)
+/* Mask including all valid SVCR bits.  */
+#define SVCR_BIT_MASK (SVCR_SM_BIT | SVCR_ZA_BIT)
+
+#endif /* ARCH_AARCH64_SCALABLE_LINUX_H */
diff --git a/gdb/arch/aarch64.c b/gdb/arch/aarch64.c
index 8644b9a..e1f4948 100644
--- a/gdb/arch/aarch64.c
+++ b/gdb/arch/aarch64.c
@@ -24,6 +24,7 @@
 #include "../features/aarch64-sve.c"
 #include "../features/aarch64-pauth.c"
 #include "../features/aarch64-mte.c"
+#include "../features/aarch64-sme.c"
 #include "../features/aarch64-tls.c"
 
 /* See arch/aarch64.h.  */
@@ -57,6 +58,10 @@ aarch64_create_target_description (const aarch64_features &features)
   if (features.tls > 0)
     regnum = create_feature_aarch64_tls (tdesc.get (), regnum, features.tls);
 
+  if (features.svq)
+    regnum = create_feature_aarch64_sme (tdesc.get (), regnum,
+					 sve_vl_from_vq (features.svq));
+
   return tdesc.release ();
 }
 
diff --git a/gdb/arch/aarch64.h b/gdb/arch/aarch64.h
index 4b3f1b8..c1cd233 100644
--- a/gdb/arch/aarch64.h
+++ b/gdb/arch/aarch64.h
@@ -27,15 +27,27 @@
 struct aarch64_features
 {
   /* A non zero VQ value indicates both the presence of SVE and the
-     Vector Quotient - the number of 128bit chunks in an SVE Z
-     register.  */
-  uint64_t vq = 0;
+     Vector Quotient - the number of 128-bit chunks in an SVE Z
+     register.
 
+     The maximum value for VQ is 16 (5 bits).  */
+  uint64_t vq = 0;
   bool pauth = false;
   bool mte = false;
 
   /* A positive TLS value indicates the number of TLS registers available.  */
   uint8_t tls = 0;
+  /* The allowed values for SVQ are the following:
+
+     0 - SME is not supported/available.
+     1 - SME is available, SVL is 16 bytes / 128-bit.
+     2 - SME is available, SVL is 32 bytes / 256-bit.
+     4 - SME is available, SVL is 64 bytes / 512-bit.
+     8 - SME is available, SVL is 128 bytes / 1024-bit.
+     16 - SME is available, SVL is 256 bytes / 2048-bit.
+
+     These use at most 5 bits to represent.  */
+  uint8_t svq = 0;
 };
 
 inline bool operator==(const aarch64_features &lhs, const aarch64_features &rhs)
@@ -43,7 +55,8 @@ inline bool operator==(const aarch64_features &lhs, const aarch64_features &rhs)
   return lhs.vq == rhs.vq
     && lhs.pauth == rhs.pauth
     && lhs.mte == rhs.mte
-    && lhs.tls == rhs.tls;
+    && lhs.tls == rhs.tls
+    && lhs.svq == rhs.svq;
 }
 
 namespace std
@@ -61,6 +74,11 @@ namespace std
       /* Shift by two bits for now.  We may need to increase this in the future
 	 if more TLS registers get added.  */
       h = h << 2 | features.tls;
+
+      /* Make sure the SVQ values are within the limits.  */
+      gdb_assert (features.svq >= 0);
+      gdb_assert (features.svq <= 16);
+      h = h << 5 | (features.svq & 0x5);
       return h;
     }
   };
@@ -171,4 +189,35 @@ enum aarch64_regnum
 /* Maximum supported VQ value.  Increase if required.  */
 #define AARCH64_MAX_SVE_VQ  16
 
+/* SME definitions
+
+   Some of these definitions are not found in the Architecture Reference
+   Manual, but we use them so we can keep a similar standard compared to the
+   SVE definitions that the Linux Kernel uses.  Otherwise it can get
+   confusing.
+
+   SVL : Streaming Vector Length.
+	 Although the documentation handles SVL in bits, we do it in
+	 bytes to match what we do for SVE.
+
+	 The streaming vector length dictates the size of the ZA register and
+	 the size of the SVE registers when in streaming mode.
+
+   SVQ : Streaming Vector Quotient.
+	 The number of 128-bit chunks in an SVE Z register or the size of
+	 each dimension of the SME ZA matrix.
+
+   SVG : Streaming Vector Granule.
+	 The number of 64-bit chunks in an SVE Z register or the size of
+	 half a SME ZA matrix dimension.  The SVG definition was added so
+	 we keep a familiar definition when dealing with SVE registers in
+	 streaming mode.  */
+
+/* The total number of tiles.  This is always fixed regardless of the
+   streaming vector length (svl).  */
+#define AARCH64_ZA_TILES_NUM 31
+/* svl limits for SME.  */
+#define AARCH64_SME_MIN_SVL 128
+#define AARCH64_SME_MAX_SVL 2048
+
 #endif /* ARCH_AARCH64_H */