diff options
author | Luis Machado <luis.machado@arm.com> | 2023-02-07 09:50:47 +0000 |
---|---|---|
committer | Luis Machado <luis.machado@arm.com> | 2023-10-04 16:23:40 +0100 |
commit | 69bfb2b6d08da64c6fe55b624aa28a68193b8b43 (patch) | |
tree | 3810e00aea006380d037a258ef9ab5f389b67a14 /gdb/arch/aarch64-scalable-linux.c | |
parent | b93d537fba70f46eae96edaea6010314c047f7ec (diff) | |
download | binutils-69bfb2b6d08da64c6fe55b624aa28a68193b8b43.zip binutils-69bfb2b6d08da64c6fe55b624aa28a68193b8b43.tar.gz binutils-69bfb2b6d08da64c6fe55b624aa28a68193b8b43.tar.bz2 |
sme: Core file support for Linux
This patch enables dumping SME state via gdb's gcore command and also
enables gdb to read SME state from a core file generated by the Linux
Kernel.
Regression-tested on aarch64-linux Ubuntu 22.04/20.04.
Reviewed-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
Diffstat (limited to 'gdb/arch/aarch64-scalable-linux.c')
-rw-r--r-- | gdb/arch/aarch64-scalable-linux.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/gdb/arch/aarch64-scalable-linux.c b/gdb/arch/aarch64-scalable-linux.c index 3803acf..2e4aa92 100644 --- a/gdb/arch/aarch64-scalable-linux.c +++ b/gdb/arch/aarch64-scalable-linux.c @@ -19,3 +19,37 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */ #include "arch/aarch64-scalable-linux.h" +#include "arch/aarch64.h" +#include "gdbsupport/byte-vector.h" +#include "gdbsupport/common-regcache.h" + +/* See arch/aarch64-scalable-linux.h */ + +bool +sve_state_is_empty (const struct reg_buffer_common *reg_buf) +{ + /* Instead of allocating a buffer with the size of the current vector + length, just use a buffer that is big enough for all cases. */ + gdb_byte zero_buffer[256]; + + /* Zero it out. */ + memset (zero_buffer, 0, 256); + + /* Are any of the Z registers set (non-zero) after the first 128 bits? */ + for (int i = 0; i < AARCH64_SVE_Z_REGS_NUM; i++) + { + if (!reg_buf->raw_compare (AARCH64_SVE_Z0_REGNUM + i, zero_buffer, + V_REGISTER_SIZE)) + return false; + } + + /* Are any of the P registers set (non-zero)? */ + for (int i = 0; i < AARCH64_SVE_P_REGS_NUM; i++) + { + if (!reg_buf->raw_compare (AARCH64_SVE_P0_REGNUM + i, zero_buffer, 0)) + return false; + } + + /* Is the FFR register set (non-zero)? */ + return reg_buf->raw_compare (AARCH64_SVE_FFR_REGNUM, zero_buffer, 0); +} |