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| author | Luis Machado <luis.machado@arm.com> | 2022-10-26 13:00:17 +0100 |
|---|---|---|
| committer | Luis Machado <luis.machado@arm.com> | 2022-10-26 13:00:17 +0100 |
| commit | b2e9e754e122d97511bbd6b990e38a23dafb6176 (patch) | |
| tree | d9a7b718b8d4aaf9097c9e88cba9c93008453cc5 /gdb/alloc.c | |
| parent | 8b73ee207c9c4b2d692a82a29d1cee2dcfa07394 (diff) | |
| download | binutils-b2e9e754e122d97511bbd6b990e38a23dafb6176.zip binutils-b2e9e754e122d97511bbd6b990e38a23dafb6176.tar.gz binutils-b2e9e754e122d97511bbd6b990e38a23dafb6176.tar.bz2 | |
gdb/arm: fix IPSR field test in arm_m_exception_cache ()
Arm v8-M Architecture Reference Manual,
D1.2.141 IPSR, Interrupt Program Status Register reads
"Exception, bits [8:0]"
9 bits, not 8! It is uncommon but true!
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'gdb/alloc.c')
0 files changed, 0 insertions, 0 deletions