AArch64 SVE: Support changing vector lengths for ptrace

When writing registers to the kernel, check if regcache VG has been changed. If
so then update the thread's vector length, then write back the registers.

When reading registers from the kernel, ensure regcache VG register is updated.
The regcache registers should already be of the correct length.

Remove all the checks that error if the vector length has changed.

gdb/ChangeLog:

	* aarch64-linux-nat.c (store_sveregs_to_thread): Set vector length.
	* nat/aarch64-sve-linux-ptrace.c (aarch64_sve_set_vq): New function.
	(aarch64_sve_regs_copy_to_reg_buf): Remove VG checks.
	(aarch64_sve_regs_copy_from_reg_buf): Likewise.
	* nat/aarch64-sve-linux-ptrace.h (aarch64_sve_set_vq): New declaration.

1 files changed, 5 insertions, 0 deletions

diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index c5070c8..8ca9614 100644
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -412,6 +412,11 @@ store_sveregs_to_thread (struct regcache *regcache)
   struct iovec iovec;
   int tid = regcache->ptid ().lwp ();
 
+  /* First store vector length to the thread.  This is done first to ensure the
+     ptrace buffers read from the kernel are the correct size.  */
+  if (!aarch64_sve_set_vq (tid, regcache))
+    perror_with_name (_("Unable to set VG register."));
+
   /* Obtain a dump of SVE registers from ptrace.  */
   std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);