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author | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2024-07-08 17:44:29 +0100 |
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committer | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2024-07-08 17:46:15 +0100 |
commit | d6ec64f93d13c4a4df5e9844a6ff93851ea643e8 (patch) | |
tree | 559944df4a96ed1968edf8c2f44e02e53d5d7a72 /gas | |
parent | 4d9e3c3f614362a452f61723380354e189888dda (diff) | |
download | binutils-d6ec64f93d13c4a4df5e9844a6ff93851ea643e8.zip binutils-d6ec64f93d13c4a4df5e9844a6ff93851ea643e8.tar.gz binutils-d6ec64f93d13c4a4df5e9844a6ff93851ea643e8.tar.bz2 |
aarch64: Add support for sve2p1 tbxq instruction.
This patch adds support for SVE2p1 "tbxq" instruction, spec is available here [1].
[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions?lang=en
Diffstat (limited to 'gas')
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-6-invalid.d | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-6-invalid.l | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-6-invalid.s | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-6.d | 10 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-6.s | 9 |
5 files changed, 37 insertions, 2 deletions
diff --git a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.d b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.d index db35ae7..437f810 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.d +++ b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.d @@ -1,3 +1,3 @@ -#name: Test of illegal SVE2.1 tblq, uzpq[1-2] and zipq[1-2] instruction. +#name: Test of illegal SVE2.1 tblq, tbxq, uzpq[1-2] and zipq[1-2] instruction. #as: -march=armv9.4-a #error_output: sve2p1-6-invalid.l diff --git a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l index 55987ac..f37a3a0 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l +++ b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l @@ -16,6 +16,18 @@ .*: Info: tblq z0.h, {z31.h}, z0.h .*: Info: tblq z0.d, {z31.d}, z0.d .*: Error: expected an SVE vector register at operand 3 -- `tblq z0.b,{z0.b},{z31.b}' +.*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.s,{z0.b},z0.b' +.*: Error: operand mismatch -- `tbxq z31.s,z0.b,z0.h' +.*: Info: did you mean this\? +.*: Info: tbxq z31.b, z0.b, z0.b +.*: Info: other valid variant\(s\): +.*: Info: tbxq z31.h, z0.h, z0.h +.*: Info: tbxq z31.s, z0.s, z0.s +.*: Info: tbxq z31.d, z0.d, z0.d +.*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.s,{z0.s,z1.s},z0.s' +.*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.h,{z0.h-z1.h},z0.h' +.*: Error: expected an SVE vector register at operand 1 -- `tbxq {z0.s},z31.s,z0.b' +.*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.b,{z0.b},{z31.b}' .*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.s,{z0.b},z0.b' .*: Error: operand mismatch -- `uzpq1 z31.s,z0.b,z0.h' .*: Info: did you mean this\? diff --git a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.s b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.s index f79dfac..7d3209e 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.s +++ b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.s @@ -4,6 +4,12 @@ tblq z0.s, {z0.s, z1.s}, z0.s tblq z0.s, {z0.s - z1.s}, z0.s tblq z0.s, {z31.s}, z0.b tblq z0.b, {z0.b}, {z31.b} +tbxq z0.s, {z0.b}, z0.b +tbxq z31.s, z0.b, z0.h +tbxq z0.s, {z0.s, z1.s}, z0.s +tbxq z0.h, {z0.h - z1.h}, z0.h +tbxq {z0.s}, z31.s, z0.b +tbxq z0.b, {z0.b}, {z31.b} uzpq1 z0.s, {z0.b}, z0.b uzpq1 z31.s, z0.b, z0.h uzpq1 z0.s, {z0.s, z1.s}, z0.s diff --git a/gas/testsuite/gas/aarch64/sve2p1-6.d b/gas/testsuite/gas/aarch64/sve2p1-6.d index 83ba142..42d1ee4 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-6.d +++ b/gas/testsuite/gas/aarch64/sve2p1-6.d @@ -1,4 +1,4 @@ -#name: Test of SVE2.1 tblq, uzpq[1-2] and zipq[1-2] instruction. +#name: Test of SVE2.1 tblq, tbxq, uzpq[1-2] and zipq[1-2] instruction. #as: -march=armv9.4-a #objdump: -dr @@ -16,6 +16,14 @@ .*: 44dffbff tblq z31.d, {z31.d}, z31.d .*: 444ff945 tblq z5.h, {z10.h}, z15.h .*: 4487f861 tblq z1.s, {z3.s}, z7.s +.*: 05203400 tbxq z0.b, z0.b, z0.b +.*: 0520341f tbxq z31.b, z0.b, z0.b +.*: 05e03400 tbxq z0.d, z0.d, z0.d +.*: 052037e0 tbxq z0.b, z31.b, z0.b +.*: 053f3400 tbxq z0.b, z0.b, z31.b +.*: 05ff37ff tbxq z31.d, z31.d, z31.d +.*: 05af3545 tbxq z5.s, z10.s, z15.s +.*: 057435ea tbxq z10.h, z15.h, z20.h .*: 4400e800 uzpq1 z0.b, z0.b, z0.b .*: 4400e81f uzpq1 z31.b, z0.b, z0.b .*: 44c0e800 uzpq1 z0.d, z0.d, z0.d diff --git a/gas/testsuite/gas/aarch64/sve2p1-6.s b/gas/testsuite/gas/aarch64/sve2p1-6.s index 11126c3..f61cd82 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-6.s +++ b/gas/testsuite/gas/aarch64/sve2p1-6.s @@ -7,6 +7,15 @@ tblq z31.d, {z31.d}, z31.d tblq z5.h, {z10.h}, z15.h tblq z1.s, {z3.s}, z7.s +tbxq z0.b, z0.b, z0.b +tbxq z31.b, z0.b, z0.b +tbxq z0.d, z0.d, z0.d +tbxq z0.b, z31.b, z0.b +tbxq z0.b, z0.b, z31.b +tbxq z31.d, z31.d, z31.d +tbxq z5.s, z10.s, z15.s +tbxq z10.h, z15.h, z20.h + uzpq1 z0.b, z0.b, z0.b uzpq1 z31.b, z0.b, z0.b uzpq1 z0.d, z0.d, z0.d |