s390: Add test cases for base/index register 0

While at it add comments to logic to omit base and/or index register 0
in s390 disassembly.

opcodes/
	* s390-dis.c: Add comments related to omitting base and/or index
	register 0 in disassembly.
gas/
	* testsuite/gas/s390/s390.exp: Add test cases for base and/or
	index register 0.
	* testsuite/gas/s390/zarch-base-index-0.s: Add test cases for
	base and/or index register 0.
	* testsuite/gas/s390/zarch-base-index-0.d: Likewise.
	* testsuite/gas/s390/zarch-base-index-0-err.s: Add error test
	cases for base and/or index register 0.

Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>

5 files changed, 394 insertions, 0 deletions

diff --git a/gas/testsuite/gas/s390/s390.exp b/gas/testsuite/gas/s390/s390.exp
index ddba9f9..f5798b4 100644
--- a/gas/testsuite/gas/s390/s390.exp
+++ b/gas/testsuite/gas/s390/s390.exp
@@ -58,4 +58,6 @@ if [expr [istarget "s390-*-*"] ||  [istarget "s390x-*-*"]]  then {
     run_dump_test "zarch-highgprs-0" "{as -mzarch} {as -m64}"
     run_dump_test "zarch-omitted-base-index" "{as -m64}"
     run_list_test "zarch-omitted-base-index-err" ""
+    run_dump_test "zarch-base-index-0" "{as -m64}"
+    run_list_test "zarch-base-index-0-err" ""
 }
diff --git a/gas/testsuite/gas/s390/zarch-base-index-0-err.l b/gas/testsuite/gas/s390/zarch-base-index-0-err.l
new file mode 100644
index 0000000..1762b6e
--- /dev/null
+++ b/gas/testsuite/gas/s390/zarch-base-index-0-err.l
@@ -0,0 +1,126 @@
+.*: Assembler messages:
+.*:5: Error: bad expression
+.*:5: Error: syntax error; missing '\)' after base register
+.*:8: Error: bad expression
+.*:8: Error: syntax error; missing '\)' after base register
+.*:9: Error: bad expression
+.*:9: Error: syntax error; missing '\)' after base register
+.*:10: Error: bad expression
+.*:10: Error: syntax error; missing '\)' after base register
+.*:11: Error: bad expression
+.*:11: Error: syntax error; missing '\)' after base register
+.*:12: Error: bad expression
+.*:12: Error: syntax error; missing '\)' after base register
+.*:15: Error: bad expression
+.*:15: Error: syntax error; missing '\)' after base register
+.*:16: Error: bad expression
+.*:16: Error: syntax error; missing '\)' after base register
+.*:17: Error: bad expression
+.*:17: Error: syntax error; missing '\)' after base register
+.*:18: Error: bad expression
+.*:18: Error: syntax error; missing '\)' after base register
+.*:19: Error: bad expression
+.*:19: Error: syntax error; missing '\)' after base register
+.*:20: Error: bad expression
+.*:20: Error: syntax error; missing '\)' after base register
+.*:21: Error: bad expression
+.*:21: Error: syntax error; missing '\)' after base register
+.*:21: Error: bad expression
+.*:21: Error: syntax error; missing '\)' after base register
+.*:22: Error: bad expression
+.*:22: Error: syntax error; missing '\)' after base register
+.*:23: Error: bad expression
+.*:23: Error: syntax error; missing '\)' after base register
+.*:24: Error: operand out of range \(0 is not between 1 and 256\)
+.*:25: Error: missing operand
+.*:26: Error: missing operand
+.*:27: Error: missing operand
+.*:27: Error: bad expression
+.*:27: Error: syntax error; missing '\)' after base register
+.*:28: Error: bad expression
+.*:28: Error: operand out of range \(0 is not between 1 and 256\)
+.*:28: Error: operand out of range \(32 is not between 0 and 15\)
+.*:28: Error: syntax error; missing '\)' after base register
+.*:28: Error: syntax error; expected ','
+.*:28: Error: bad expression
+.*:28: Error: found 'r', expected: '\)'
+.*:28: Error: syntax error; missing '\)' after base register
+.*:28: Error: junk at end of line: `r2\)'
+.*:29: Error: syntax error; missing '\(' after displacement
+.*:30: Error: invalid length field specified
+.*:33: Error: bad expression
+.*:33: Error: syntax error; missing '\)' after base register
+.*:34: Error: bad expression
+.*:34: Error: syntax error; missing '\)' after base register
+.*:35: Error: bad expression
+.*:35: Error: syntax error; missing '\)' after base register
+.*:36: Error: bad expression
+.*:36: Error: syntax error; missing '\)' after base register
+.*:37: Error: bad expression
+.*:37: Error: syntax error; missing '\)' after base register
+.*:38: Error: bad expression
+.*:38: Error: syntax error; missing '\)' after base register
+.*:39: Error: bad expression
+.*:39: Error: syntax error; missing '\)' after base register
+.*:39: Error: bad expression
+.*:39: Error: syntax error; missing '\)' after base register
+.*:40: Error: bad expression
+.*:40: Error: syntax error; missing '\)' after base register
+.*:41: Error: bad expression
+.*:41: Error: syntax error; missing '\)' after base register
+.*:42: Error: operand out of range \(0 is not between 1 and 16\)
+.*:43: Error: missing operand
+.*:44: Error: missing operand
+.*:45: Error: missing operand
+.*:45: Error: bad expression
+.*:45: Error: syntax error; missing '\)' after base register
+.*:46: Error: bad expression
+.*:46: Error: operand out of range \(0 is not between 1 and 16\)
+.*:46: Error: operand out of range \(32 is not between 0 and 15\)
+.*:46: Error: syntax error; missing '\)' after base register
+.*:46: Error: syntax error; expected ','
+.*:46: Error: found ',', expected: '\)'
+.*:47: Error: syntax error; missing '\(' after displacement
+.*:48: Error: operand out of range \(0 is not between 1 and 16\)
+.*:49: Error: missing operand
+.*:50: Error: missing operand
+.*:51: Error: missing operand
+.*:51: Error: bad expression
+.*:51: Error: syntax error; missing '\)' after base register
+.*:52: Error: bad expression
+.*:52: Error: operand out of range \(0 is not between 1 and 16\)
+.*:52: Error: syntax error; expected ','
+.*:53: Error: syntax error; missing '\(' after displacement
+.*:54: Error: operand out of range \(0 is not between 1 and 16\)
+.*:54: Error: operand out of range \(0 is not between 1 and 16\)
+.*:55: Error: missing operand
+.*:55: Error: missing operand
+.*:56: Error: missing operand
+.*:56: Error: missing operand
+.*:57: Error: missing operand
+.*:57: Error: bad expression
+.*:57: Error: syntax error; missing '\)' after base register
+.*:57: Error: missing operand
+.*:57: Error: bad expression
+.*:57: Error: syntax error; missing '\)' after base register
+.*:58: Error: bad expression
+.*:58: Error: operand out of range \(0 is not between 1 and 16\)
+.*:58: Error: operand out of range \(32 is not between 0 and 15\)
+.*:58: Error: syntax error; missing '\)' after base register
+.*:58: Error: syntax error; expected ','
+.*:58: Error: bad expression
+.*:58: Error: missing '\)'
+.*:58: Error: operand out of range \(0 is not between 1 and 16\)
+.*:58: Error: syntax error; expected ','
+.*:59: Error: syntax error; missing '\(' after displacement
+.*:59: Error: syntax error; missing '\(' after displacement
+.*:62: Error: bad expression
+.*:62: Error: syntax error; missing '\)' after base register
+.*:63: Error: bad expression
+.*:63: Error: syntax error; missing '\)' after base register
+.*:64: Error: bad expression
+.*:64: Error: syntax error; missing '\)' after base register
+.*:65: Error: bad expression
+.*:65: Error: syntax error; missing '\)' after base register
+.*:66: Error: bad expression
+.*:66: Error: syntax error; missing '\)' after base register
diff --git a/gas/testsuite/gas/s390/zarch-base-index-0-err.s b/gas/testsuite/gas/s390/zarch-base-index-0-err.s
new file mode 100644
index 0000000..175cc90
--- /dev/null
+++ b/gas/testsuite/gas/s390/zarch-base-index-0-err.s
@@ -0,0 +1,66 @@
+.text
+foo:
+
+#		D1(B1),I2
+	mvi	16(),32			# syntax error: empty parentheses
+
+#		R1,D2(X2,B2)
+	a	%r1,16(%r2,)		# syntax error: explicitly omitted base
+	a	%r1,16(%r0,)		# syntax error: explicitly omitted base
+	a	%r1,16(0,)		# syntax error: explicitly omitted base
+	a	%r1,16(,)		# syntax error: explicitly omitted index & base
+	a	%r1,16()		# syntax error: empty parentheses
+
+#		D1(L1,B1),D2(B2)
+	mvc	16(1,),32(%r2)		# syntax error: explicitly omitted base
+	mvc	16(1,%r1),32()		# syntax error: empty parentheses
+	mvc	16(1,%r0),32()		# syntax error: empty parentheses
+	mvc	16(1,0),32()		# syntax error: empty parentheses
+	mvc	16(1,),32(%r0)		# syntax error: explicitly omitted base
+	mvc	16(1,),32(0)		# syntax error: explicitly omitted base
+	mvc	16(1,),32()		# syntax error: explicitly omitted base & empty parentheses
+	mvc	16(1,),32		# syntax error: explicitly omitted base
+	mvc	16(1),32()		# syntax error: empty parentheses
+	mvc	16(0,%r1),32(%r2)	# syntax error: length 0
+	mvc	16(,%r1),32(%r2)	# syntax error: explicitly omitted length
+	mvc	16(,1),32(%r2)		# syntax error: explicitly omitted length
+	mvc	16(,),32(%r2)		# syntax error: explicitly omitted length & base
+	mvc	16(),32(%r2)		# syntax error: empty parenthesis
+	mvc	16,32(%r2)		# syntax error: missing length
+	mvc	16(%r1),32(%r2)		# syntax error: omitted length
+
+#		D1(L1,B1),D2(L2,B2)
+	unpk	16(1,),32(2,%r2)	# syntax error: explicitly omitted base
+	unpk	16(1,%r1),32(2,)	# syntax error: explicitly omitted base
+	unpk	16(1,%r0),32(2,)	# syntax error: explicitly omitted base
+	unpk	16(1,0),32(2,)		# syntax error: explicitly omitted base
+	unpk	16(1,),32(2,%r0)	# syntax error: explicitly omitted base
+	unpk	16(1,),32(2,0)		# syntax error: explicitly omitted base
+	unpk	16(1,),32(2,)		# syntax error: explicitly omitted base
+	unpk	16(1,),32(2)		# syntax error: explicitly omitted base
+	unpk	16(1),32(2,)		# syntax error: explicitly omitted base
+	unpk	16(0,%r1),32(2,%r2)	# syntax error: length 0
+	unpk	16(,%r1),32(2,%r2)	# syntax error: explicitly omitted length
+	unpk	16(,1),32(2,%r2)	# syntax error: explicitly omitted length
+	unpk	16(,),32(2,%r2)		# syntax error: explicitly omitted length & base
+	unpk	16(),32(2,%r2)		# syntax error: empty parenthesis
+	unpk	16,32(2,%r2)		# syntax error: missing length
+	unpk	16(1,%r1),32(0,%r2)	# syntax error: length 0
+	unpk	16(1,%r1),32(,%r2)	# syntax error: explicitly omitted length
+	unpk	16(1,%r1),32(,2)	# syntax error: explicitly omitted length
+	unpk	16(1,%r1),32(,)		# syntax error: explicitly omitted length & base
+	unpk	16(1,%r1),32()		# syntax error: empty parenthesis
+	unpk	16(1,%r1),32		# syntax error: missing length
+	unpk	16(0,%r1),32(0,%r2)	# syntax error: lengths 0
+	unpk	16(,%r1),32(,%r2)	# syntax error: explicitly omitted length
+	unpk	16(,1),32(,2)		# syntax error: explicitly omitted length
+	unpk	16(,),32(,)		# syntax error: explicitly omitted length & base
+	unpk	16(),32()		# syntax error: empty parentheses
+	unpk	16,32			# syntax error: missing lengths
+
+#		V1,D2(VX2,B2),M3
+	vgef	%v1,16(%v2,),0		# syntax error: explicitly omitted base
+	vgef	%v1,16(%v0,),0		# syntax error: explicitly omitted base
+	vgef	%v1,16(0,),0		# syntax error: explicitly omitted base
+	vgef	%v1,16(,),0		# syntax error: explicitly omitted index & base
+	vgef	%v1,16(),0		# syntax error: empty parentheses
diff --git a/gas/testsuite/gas/s390/zarch-base-index-0.d b/gas/testsuite/gas/s390/zarch-base-index-0.d
new file mode 100644
index 0000000..e626604
--- /dev/null
+++ b/gas/testsuite/gas/s390/zarch-base-index-0.d
@@ -0,0 +1,84 @@
+#name: s390x base/index register 0
+#objdump: -dr
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+.* <foo>:
+.*:	92 20 10 10 [	 ]*mvi	16\(%r1\),32
+.*:	92 20 00 10 [	 ]*mvi	16,32
+.*:	92 20 00 10 [	 ]*mvi	16,32
+.*:	92 20 00 10 [	 ]*mvi	16,32
+.*:	92 20 00 00 [	 ]*mvi	0,32
+.*:	92 00 00 00 [	 ]*mvi	0,0
+.*:	5a 12 30 10 [	 ]*a	%r1,16\(%r2,%r3\)
+.*:	5a 10 30 10 [	 ]*a	%r1,16\(%r3\)
+.*:	5a 10 30 10 [	 ]*a	%r1,16\(%r3\)
+.*:	5a 10 30 10 [	 ]*a	%r1,16\(%r3\)
+.*:	5a 10 30 10 [	 ]*a	%r1,16\(%r3\)
+.*:	5a 12 00 10 [	 ]*a	%r1,16\(%r2,%r0\)
+.*:	5a 12 00 10 [	 ]*a	%r1,16\(%r2,%r0\)
+.*:	5a 10 00 10 [	 ]*a	%r1,16
+.*:	5a 10 00 10 [	 ]*a	%r1,16
+.*:	5a 10 00 10 [	 ]*a	%r1,16
+.*:	5a 10 00 10 [	 ]*a	%r1,16
+.*:	5a 10 00 10 [	 ]*a	%r1,16
+.*:	5a 10 00 10 [	 ]*a	%r1,16
+.*:	5a 10 00 10 [	 ]*a	%r1,16
+.*:	5a 10 00 10 [	 ]*a	%r1,16
+.*:	5a 10 00 00 [	 ]*a	%r1,0
+.*:	5a 00 00 00 [	 ]*a	%r0,0
+.*:	5a 00 00 00 [	 ]*a	%r0,0
+.*:	d2 00 10 10 20 20 [	 ]*mvc	16\(1,%r1\),32\(%r2\)
+.*:	d2 00 00 10 20 20 [	 ]*mvc	16\(1,%r0\),32\(%r2\)
+.*:	d2 00 00 10 20 20 [	 ]*mvc	16\(1,%r0\),32\(%r2\)
+.*:	d2 00 00 10 20 20 [	 ]*mvc	16\(1,%r0\),32\(%r2\)
+.*:	d2 00 10 10 00 20 [	 ]*mvc	16\(1,%r1\),32
+.*:	d2 00 10 10 00 20 [	 ]*mvc	16\(1,%r1\),32
+.*:	d2 00 10 10 00 20 [	 ]*mvc	16\(1,%r1\),32
+.*:	d2 00 00 10 00 20 [	 ]*mvc	16\(1,%r0\),32
+.*:	d2 00 00 10 00 20 [	 ]*mvc	16\(1,%r0\),32
+.*:	d2 00 00 10 00 20 [	 ]*mvc	16\(1,%r0\),32
+.*:	d2 00 00 10 00 20 [	 ]*mvc	16\(1,%r0\),32
+.*:	d2 00 00 10 00 20 [	 ]*mvc	16\(1,%r0\),32
+.*:	d2 00 00 10 00 20 [	 ]*mvc	16\(1,%r0\),32
+.*:	d2 00 00 10 00 20 [	 ]*mvc	16\(1,%r0\),32
+.*:	d2 00 00 10 00 20 [	 ]*mvc	16\(1,%r0\),32
+.*:	d2 00 00 10 00 20 [	 ]*mvc	16\(1,%r0\),32
+.*:	d2 00 00 00 00 00 [	 ]*mvc	0\(1,%r0\),0
+.*:	f3 01 10 10 20 20 [	 ]*unpk	16\(1,%r1\),32\(2,%r2\)
+.*:	f3 01 00 10 20 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r2\)
+.*:	f3 01 00 10 20 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r2\)
+.*:	f3 01 00 10 20 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r2\)
+.*:	f3 01 10 10 00 20 [	 ]*unpk	16\(1,%r1\),32\(2,%r0\)
+.*:	f3 01 10 10 00 20 [	 ]*unpk	16\(1,%r1\),32\(2,%r0\)
+.*:	f3 01 10 10 00 20 [	 ]*unpk	16\(1,%r1\),32\(2,%r0\)
+.*:	f3 01 00 10 00 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r0\)
+.*:	f3 01 00 10 00 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r0\)
+.*:	f3 01 00 10 00 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r0\)
+.*:	f3 01 00 10 00 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r0\)
+.*:	f3 01 00 10 00 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r0\)
+.*:	f3 01 00 10 00 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r0\)
+.*:	f3 01 00 10 00 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r0\)
+.*:	f3 01 00 10 00 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r0\)
+.*:	f3 01 00 10 00 20 [	 ]*unpk	16\(1,%r0\),32\(2,%r0\)
+.*:	f3 01 00 00 00 00 [	 ]*unpk	0\(1,%r0\),0\(2,%r0\)
+.*:	e7 12 30 10 00 13 [	 ]*vgef	%v1,16\(%v2,%r3\),0
+.*:	e7 10 30 10 00 13 [	 ]*vgef	%v1,16\(%r3\),0
+.*:	e7 10 30 10 00 13 [	 ]*vgef	%v1,16\(%r3\),0
+.*:	e7 10 30 10 00 13 [	 ]*vgef	%v1,16\(%r3\),0
+.*:	e7 10 30 10 00 13 [	 ]*vgef	%v1,16\(%r3\),0
+.*:	e7 12 00 10 00 13 [	 ]*vgef	%v1,16\(%v2,%r0\),0
+.*:	e7 12 00 10 00 13 [	 ]*vgef	%v1,16\(%v2,%r0\),0
+.*:	e7 10 00 10 00 13 [	 ]*vgef	%v1,16,0
+.*:	e7 10 00 10 00 13 [	 ]*vgef	%v1,16,0
+.*:	e7 10 00 10 00 13 [	 ]*vgef	%v1,16,0
+.*:	e7 10 00 10 00 13 [	 ]*vgef	%v1,16,0
+.*:	e7 10 00 10 00 13 [	 ]*vgef	%v1,16,0
+.*:	e7 10 00 10 00 13 [	 ]*vgef	%v1,16,0
+.*:	e7 10 00 10 00 13 [	 ]*vgef	%v1,16,0
+.*:	e7 00 00 10 00 13 [	 ]*vgef	%v0,16,0
+.*:	e7 00 00 10 00 13 [	 ]*vgef	%v0,16,0
+.*:	e7 00 00 00 00 13 [	 ]*vgef	%v0,0,0
+.*:	07 07 [	 ]*nopr	%r7
diff --git a/gas/testsuite/gas/s390/zarch-base-index-0.s b/gas/testsuite/gas/s390/zarch-base-index-0.s
new file mode 100644
index 0000000..15c792d
--- /dev/null
+++ b/gas/testsuite/gas/s390/zarch-base-index-0.s
@@ -0,0 +1,116 @@
+.text
+foo:
+
+#		D1(B1),I2
+	mvi	16(%r1),32
+	mvi	16(%r0),32
+	mvi	16(0),32
+#	mvi	16(),32			# syntax error: empty parentheses
+	mvi	16,32
+	mvi	0,32
+	mvi	0,0
+
+#		R1,D2(X2,B2)
+	a	%r1,16(%r2,%r3)
+	a	%r1,16(%r0,%r3)
+	a	%r1,16(0,%r3)
+	a	%r1,16(,%r3)
+	a	%r1,16(%r3)
+	a	%r1,16(%r2,%r0)
+	a	%r1,16(%r2,0)
+#	a	%r1,16(%r2,)		# syntax error: explicitly omitted base
+	a	%r1,16(%r0,%r0)
+	a	%r1,16(%r0,0)
+#	a	%r1,16(%r0,)		# syntax error: explicitly omitted base
+	a	%r1,16(0,%r0)
+	a	%r1,16(0,0)
+#	a	%r1,16(0,)		# syntax error: explicitly omitted base
+	a	%r1,16(0,%r0)
+	a	%r1,16(,%r0)
+	a	%r1,16(,0)
+#	a	%r1,16(,)		# syntax error: explicitly omitted index & base
+#	a	%r1,16()		# syntax error: empty parentheses
+	a	%r1,16
+	a	%r1,0
+	a	%r0,0
+	a	0,0
+
+#		D1(L1,B1),D2(B2)
+	mvc	16(1,%r1),32(%r2)
+	mvc	16(1,%r0),32(%r2)
+	mvc	16(1,0),32(%r2)
+#	mvc	16(1,),32(%r2)		# syntax error: explicitly omitted base
+	mvc	16(1),32(%r2)
+	mvc	16(1,%r1),32(%r0)
+	mvc	16(1,%r1),32(0)
+#	mvc	16(1,%r1),32()		# syntax error: empty parentheses
+	mvc	16(1,%r1),32
+	mvc	16(1,%r0),32(%r0)
+	mvc	16(1,%r0),32(0)
+#	mvc	16(1,%r0),32()		# syntax error: empty parentheses
+	mvc	16(1,%r0),32
+	mvc	16(1,0),32(%r0)
+	mvc	16(1,0),32(0)
+#	mvc	16(1,0),32()		# syntax error: empty parentheses
+	mvc	16(1,0),32
+#	mvc	16(1,),32(%r0)		# syntax error: explicitly omitted base
+#	mvc	16(1,),32(0)		# syntax error: explicitly omitted base
+#	mvc	16(1,),32()		# syntax error: explicitly omitted base & empty parentheses
+#	mvc	16(1,),32		# syntax error: explicitly omitted base
+	mvc	16(1),32(%r0)
+	mvc	16(1),32(0)
+#	mvc	16(1),32()		# syntax error: empty parentheses
+	mvc	16(1),32
+	mvc	0(1),0
+
+#		D1(L1,B1),D2(L2,B2)
+	unpk	16(1,%r1),32(2,%r2)
+	unpk	16(1,%r0),32(2,%r2)
+	unpk	16(1,0),32(2,%r2)
+#	unpk	16(1,),32(2,%r2)	# syntax error: explicitly omitted base
+	unpk	16(1),32(2,%r2)
+	unpk	16(1,%r1),32(2,%r0)
+	unpk	16(1,%r1),32(2,0)
+#	unpk	16(1,%r1),32(2,)	# syntax error: explicitly omitted base
+	unpk	16(1,%r1),32(2)
+	unpk	16(1,%r0),32(2,%r0)
+	unpk	16(1,%r0),32(2,0)
+#	unpk	16(1,%r0),32(2,)	# syntax error: explicitly omitted base
+	unpk	16(1,%r0),32(2)
+	unpk	16(1,0),32(2,%r0)
+	unpk	16(1,0),32(2,0)
+#	unpk	16(1,0),32(2,)		# syntax error: explicitly omitted base
+	unpk	16(1,0),32(2)
+#	unpk	16(1,),32(2,%r0)	# syntax error: explicitly omitted base
+#	unpk	16(1,),32(2,0)		# syntax error: explicitly omitted base
+#	unpk	16(1,),32(2,)		# syntax error: explicitly omitted base
+#	unpk	16(1,),32(2)		# syntax error: explicitly omitted base
+	unpk	16(1),32(2,%r0)
+	unpk	16(1),32(2,0)
+#	unpk	16(1),32(2,)		# syntax error: explicitly omitted base
+	unpk	16(1),32(2)
+	unpk	0(1),0(2)
+
+#		V1,D2(VX2,B2),M3
+	vgef	%v1,16(%v2,%r3),0
+	vgef	%v1,16(%v0,%r3),0
+	vgef	%v1,16(0,%r3),0
+	vgef	%v1,16(,%r3),0
+	vgef	%v1,16(%r3),0
+	vgef	%v1,16(%v2,%r0),0
+	vgef	%v1,16(%v2,0),0
+#	vgef	%v1,16(%v2,),0		# syntax error: explicitly omitted base
+	vgef	%v1,16(%v0,%r0),0
+	vgef	%v1,16(%v0,0),0
+#	vgef	%v1,16(%v0,),0		# syntax error: explicitly omitted base
+	vgef	%v1,16(0,%r0),0
+	vgef	%v1,16(0,0),0
+#	vgef	%v1,16(0,),0		# syntax error: explicitly omitted base
+	vgef	%v1,16(,%r0),0
+	vgef	%v1,16(,0),0
+#	vgef	%v1,16(,),0		# syntax error: explicitly omitted index & base
+#	vgef	%v1,16(),0		# syntax error: empty parentheses
+	vgef	%v1,16,0
+	vgef	%v0,16,0
+	vgef	0,16,0
+	vgef	0,0,0