diff options
| author | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2018-07-02 11:18:24 +0100 |
|---|---|---|
| committer | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2018-07-02 11:18:24 +0100 |
| commit | a05a5b64cf33d36d93a92fd03ae900e18dbe5572 (patch) | |
| tree | 15b75a1cf3c0fc782160e6e592c63d822e312e6e /gas | |
| parent | f2075844e2d4dc0f3f0d15b1acf20651f19cbb33 (diff) | |
| download | binutils-a05a5b64cf33d36d93a92fd03ae900e18dbe5572.zip binutils-a05a5b64cf33d36d93a92fd03ae900e18dbe5572.tar.gz binutils-a05a5b64cf33d36d93a92fd03ae900e18dbe5572.tar.bz2 | |
Fix use of "command line X" in binutils doc
Binutils documentation uses a mix of spelling for the compound word
"command-line X". According to [1]:
"Sometimes compound words are written separately (nail polish),
sometimes with a hyphen (short-sighted) and sometimes as one word
(eyelashes). Often new compounds are written as two separate words and,
as they become more familiar, they are either connected with a hyphen
(-) or made into one word."
I think command-line X is common enough in our industry that the two
workds command and line should be connected. Since command-line is more
common than commandline, I propose to update binutils documentation to
consistently use "command-line" when this is used as an adjective to a
noun (eg. command-line argument, command-line switch, command-line
option and command-line flag). I've left occurences of "the command
line" as is. I've also left gdb, sim and readline alone and have only
touched public documentation (texi and NEWS files).
[1]
http://dictionary.cambridge.org/grammar/british-grammar/word-formation/compounds
2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* doc/bfdint.texi: Use command-line consistently when used in a
compount word.
* doc/bfdsumm.texi: Likewise.
binutils/
* NEWS: Use command-line consistently when used in a compount word.
* doc/binutils.texi: Likewise and fix trailing whitespace on same
line.
gas/
* NEWS: Use command-line consistently when used in a compount word.
* doc/as.texi: Likewise.
* doc/c-aarch64.texi: Likewise.
* doc/c-alpha.texi: Likewise.
* doc/c-arc.texi: Likewise.
* doc/c-arm.texi: Likewise.
* doc/c-avr.texi: Likewise.
* doc/c-bfin.texi: Likewise.
* doc/c-cris.texi: Likewise.
* doc/c-epiphany.texi: Likewise.
* doc/c-i386.texi: Likewise.
* doc/c-ia64.texi: Likewise.
* doc/c-lm32.texi: Likewise.
* doc/c-m32r.texi: Likewise.
* doc/c-m68k.texi: Likewise.
* doc/c-mips.texi: Likewise.
* doc/c-mmix.texi: Likewise.
* doc/c-msp430.texi: Likewise.
* doc/c-mt.texi: Likewise.
* doc/c-nios2.texi: Likewise.
* doc/c-ppc.texi: Likewise.
* doc/c-pru.texi: Likewise.
* doc/c-rl78.texi: Likewise.
* doc/c-rx.texi: Likewise.
* doc/c-tic6x.texi: Likewise.
* doc/c-v850.texi: Likewise.
* doc/c-vax.texi: Likewise.
* doc/c-visium.texi: Likewise.
* doc/c-xstormy16.texi: Likewise.
* doc/c-xtensa.texi: Likewise.
* doc/c-z80.texi: Likewise.
* doc/c-z8k.texi: Likewise.
* doc/internals.texi: Likewise.
gprof/
* gprof.texi: Use command-line consistently when used in a compount
word.
ld/
* NEWS: Use command-line consistently when used in a compount word.
* ld.texinfo: Likewise.
* ldint.texinfo: Likewise.
Diffstat (limited to 'gas')
34 files changed, 275 insertions, 239 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 70a9229..9a28648 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,39 @@ +2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * NEWS: Use command-line consistently when used in a compount word. + * doc/as.texi: Likewise. + * doc/c-aarch64.texi: Likewise. + * doc/c-alpha.texi: Likewise. + * doc/c-arc.texi: Likewise. + * doc/c-arm.texi: Likewise. + * doc/c-avr.texi: Likewise. + * doc/c-bfin.texi: Likewise. + * doc/c-cris.texi: Likewise. + * doc/c-epiphany.texi: Likewise. + * doc/c-i386.texi: Likewise. + * doc/c-ia64.texi: Likewise. + * doc/c-lm32.texi: Likewise. + * doc/c-m32r.texi: Likewise. + * doc/c-m68k.texi: Likewise. + * doc/c-mips.texi: Likewise. + * doc/c-mmix.texi: Likewise. + * doc/c-msp430.texi: Likewise. + * doc/c-mt.texi: Likewise. + * doc/c-nios2.texi: Likewise. + * doc/c-ppc.texi: Likewise. + * doc/c-pru.texi: Likewise. + * doc/c-rl78.texi: Likewise. + * doc/c-rx.texi: Likewise. + * doc/c-tic6x.texi: Likewise. + * doc/c-v850.texi: Likewise. + * doc/c-vax.texi: Likewise. + * doc/c-visium.texi: Likewise. + * doc/c-xstormy16.texi: Likewise. + * doc/c-xtensa.texi: Likewise. + * doc/c-z80.texi: Likewise. + * doc/c-z8k.texi: Likewise. + * doc/internals.texi: Likewise. + 2018-06-29 Jim Wilson <jimw@sifive.com> * config/tc-riscv.c (md_begin): Call hash_reg_name for "fp". @@ -70,7 +70,7 @@ Changes in 2.27: assembler should generate common symbols with the STT_COMMON type by default. Default to no. -* New command line option --elf-stt-common= for ELF targets to control +* New command-line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF @@ -80,10 +80,10 @@ Changes in 2.27: x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. -* New command line option -mrelax-relocations= for x86 target to control +* New command-line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. -* New command line option -mfence-as-lock-add=yes for x86 target to encode +* New command-line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. @@ -127,7 +127,7 @@ Changes in 2.25: * Replace support for openrisc and or32 with support for or1k. * Enhanced the ARM port to accept the assembler output from the CodeComposer - Studio tool. Support is enabled via the new command line option -mccs. + Studio tool. Support is enabled via the new command-line option -mccs. * Add support for the Andes NDS32. @@ -135,7 +135,7 @@ Changes in 2.24: * Add support for the Texas Instruments MSP430X processor. -* Add -gdwarf-sections command line option to enable per-code-section +* Add -gdwarf-sections command-line option to enable per-code-section generation of DWARF .debug_line sections. * Add support for Altera Nios II. @@ -182,7 +182,7 @@ Changes in 2.21: * Add support for the Renesas RX processor. -* New command line option, --compress-debug-sections, which requests +* New command-line option, --compress-debug-sections, which requests compression of DWARF debug information sections in the relocatable output file. Compressed debug sections are supported by readelf, objdump, and gold, but not currently by Gnu ld. @@ -219,23 +219,23 @@ Changes in 2.19: * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind tables without runtime relocation. -* New command line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which +* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which adds compatibility with H'00 style hex constants. -* New command line option, -msse-check=[none|error|warning], for x86 +* New command-line option, -msse-check=[none|error|warning], for x86 targets. -* New sub-option added to the assembler's -a command line switch to +* New sub-option added to the assembler's -a command-line switch to generate a listing output. The 'g' sub-option will insert into the listing various information about the assembly, such as assembler version, the - command line options used, and a time stamp. + command-line options used, and a time stamp. -* New command line option -msse2avx for x86 target to encode SSE +* New command-line option -msse2avx for x86 target to encode SSE instructions with VEX prefix. * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target. -* New command line options, -march=CPU[,+EXTENSION...], -mtune=CPU, +* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU, -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg, -mnaked-reg and -mold-gcc, for x86 targets. @@ -268,7 +268,7 @@ Changes in 2.17: * Add support for the "@<file>" syntax to the command line, so that extra switches can be read from <file>. -* The SH target supports a new command line switch --enable-reg-prefix which, +* The SH target supports a new command-line switch --enable-reg-prefix which, if enabled, will allow register names to be optionally prefixed with a $ character. This allows register names to be distinguished from label names. @@ -289,15 +289,15 @@ Changes in 2.17: for the VAX target in order to be more compatible with the VAX MACRO assembler. -* New command line option -mtune=[itanium1|itanium2] for IA64 targets. +* New command-line option -mtune=[itanium1|itanium2] for IA64 targets. Changes in 2.16: * Redefinition of macros now results in an error. -* New command line option -mhint.b=[ok|warning|error] for IA64 targets. +* New command-line option -mhint.b=[ok|warning|error] for IA64 targets. -* New command line option -munwind-check=[warning|error] for IA64 +* New command-line option -munwind-check=[warning|error] for IA64 targets. * The IA64 port now uses automatic dependency violation removal as its default @@ -307,7 +307,7 @@ Changes in 2.16: * Added support for generating unwind tables for ARM ELF targets. -* Add a -g command line option to generate debug information in the target's +* Add a -g command-line option to generate debug information in the target's preferred debug format. * Support for the crx-elf target added. @@ -322,9 +322,9 @@ Changes in 2.16: * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC instrucitons. -* New command line option -mno-shared for MIPS ELF targets. +* New command-line option -mno-shared for MIPS ELF targets. -* New command line option --alternate and pseudo-ops .altmacro and .noaltmacro +* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro added to enter (and leave) alternate macro syntax mode. Changes in 2.15: @@ -418,7 +418,7 @@ Changes in 2.12: but still works for compatability. * The MIPS assembler no longer issues a warning by default when it - generates a nop instruction from a macro. The new command line option + generates a nop instruction from a macro. The new command-line option -n will turn on the warning. Changes in 2.11: @@ -441,7 +441,7 @@ Changes in 2.11: * x86 gas has a new .arch pseudo op to specify the target CPU architecture. -* x86 gas -q command line option quietens warnings about register size changes +* x86 gas -q command-line option quietens warnings about register size changes due to suffix, indirect jmp/call without `*', stand-alone prefixes, and translating various deprecated floating point instructions. diff --git a/gas/doc/as.texi b/gas/doc/as.texi index 493049c..49b1ef1 100644 --- a/gas/doc/as.texi +++ b/gas/doc/as.texi @@ -757,7 +757,7 @@ configure option. @end ifset @item --help -Print a summary of the command line options and exit. +Print a summary of the command-line options and exit. @item --target-help Print a summary of all target specific options and exit. @@ -1607,12 +1607,12 @@ an MCore processor. @item -jsri2bsr @itemx -nojsri2bsr Enable or disable the JSRI to BSR transformation. By default this is enabled. -The command line option @samp{-nojsri2bsr} can be used to disable it. +The command-line option @samp{-nojsri2bsr} can be used to disable it. @item -sifilter @itemx -nosifilter Enable or disable the silicon filter behaviour. By default this is disabled. -The default can be overridden by the @samp{-sifilter} command line option. +The default can be overridden by the @samp{-sifilter} command-line option. @item -relax Alter jump instructions for long displacements. @@ -2011,7 +2011,7 @@ significant. explicitly, as one of the files for @command{@value{AS}} to assemble. @cindex options, command line -Except for @samp{--} any command line argument that begins with a +Except for @samp{--} any command-line argument that begins with a hyphen (@samp{-}) is an option. Each option changes the behavior of @command{@value{AS}}. No option changes the way another option works. An option is a @samp{-} followed by one or more letters; the case of @@ -2050,7 +2050,7 @@ program. The source program is made up of one or more files. You give @command{@value{AS}} a command line that has zero or more input file names. The input files are read (from left file name to right). A -command line argument (in any position) that has no special meaning +command-line argument (in any position) that has no special meaning is taken to be an input file name. If you give @command{@value{AS}} no file names it attempts to read one input file @@ -2288,7 +2288,7 @@ The letters after @samp{-a} may be combined into one option, Note if the assembler source is coming from the standard input (e.g., because it -is being created by @code{@value{GCC}} and the @samp{-pipe} command line switch +is being created by @code{@value{GCC}} and the @samp{-pipe} command-line switch is being used) then the listing will not contain any comments or preprocessor directives. This is because the listing code buffers input source lines from stdin only after they have been preprocessed by the assembler. This reduces @@ -2383,7 +2383,7 @@ in the object file. Usually if you do this you also tell the linker @node listing @section Configuring listing output: @option{--listing} -The listing feature of the assembler can be enabled via the command line switch +The listing feature of the assembler can be enabled via the command-line switch @samp{-a} (@pxref{a}). This feature combines the input source file(s) with a hex dump of the corresponding locations in the output object file, and displays them as a listing file. The format of this listing can be controlled by @@ -2777,7 +2777,7 @@ specific, and some targets multiple comment characters. Some targets also have line comment characters that only work if they are the first character on a line. Some targets use a sequence of two characters to introduce a line comment. Some targets can also change their line comment characters depending -upon command line options that have been used. For more details see the +upon command-line options that have been used. For more details see the @emph{Syntax} section in the documentation for individual targets. If the line comment character is the hash sign (@samp{#}) then it still has the @@ -5700,7 +5700,7 @@ counter, and @code{.nolist} decrements it. Assembly listings are generated whenever the counter is greater than zero. By default, listings are disabled. When you enable them (with the -@samp{-a} command line option; @pxref{Invoking,,Command-Line Options}), +@samp{-a} command-line option; @pxref{Invoking,,Command-Line Options}), the initial value of the listing counter is one. @node Ln diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 0423995..b659b8b 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -34,23 +34,23 @@ @c man begin OPTIONS @table @gcctabopt -@cindex @option{-EB} command line option, AArch64 +@cindex @option{-EB} command-line option, AArch64 @item -EB This option specifies that the output generated by the assembler should be marked as being encoded for a big-endian processor. -@cindex @option{-EL} command line option, AArch64 +@cindex @option{-EL} command-line option, AArch64 @item -EL This option specifies that the output generated by the assembler should be marked as being encoded for a little-endian processor. -@cindex @option{-mabi=} command line option, AArch64 +@cindex @option{-mabi=} command-line option, AArch64 @item -mabi=@var{abi} Specify which ABI the source code uses. The recognized arguments are: @code{ilp32} and @code{lp64}, which decides the generated object file in ELF32 and ELF64 format respectively. The default is @code{lp64}. -@cindex @option{-mcpu=} command line option, AArch64 +@cindex @option{-mcpu=} command-line option, AArch64 @item -mcpu=@var{processor}[+@var{extension}@dots{}] This option specifies the target processor. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute @@ -85,7 +85,7 @@ extension, then then those extensions are automatically enabled. Consequently, you will not normally have to specify any additional extensions. -@cindex @option{-march=} command line option, AArch64 +@cindex @option{-march=} command-line option, AArch64 @item -march=@var{architecture}[+@var{extension}@dots{}] This option specifies the target architecture. The assembler will issue an error message if an attempt is made to assemble an @@ -102,12 +102,12 @@ extension options as the @option{-mcpu} option. Unlike @option{-mcpu}, extensions are not always enabled by default, @xref{AArch64 Extensions}. -@cindex @code{-mverbose-error} command line option, AArch64 +@cindex @code{-mverbose-error} command-line option, AArch64 @item -mverbose-error This option enables verbose error messages for AArch64 gas. This option is enabled by default. -@cindex @code{-mno-verbose-error} command line option, AArch64 +@cindex @code{-mno-verbose-error} command-line option, AArch64 @item -mno-verbose-error This option disables verbose error messages in AArch64 gas. @@ -285,7 +285,7 @@ The AArch64 architecture uses @sc{ieee} floating-point numbers. @cindex @code{.arch} directive, AArch64 @item .arch @var{name} Select the target architecture. Valid values for @var{name} are the same as -for the @option{-march} commandline option. +for the @option{-march} command-line option. Specifying @code{.arch} clears any previously selected architecture extensions. @@ -294,7 +294,7 @@ extensions. @item .arch_extension @var{name} Add or remove an architecture extension to the target architecture. Valid values for @var{name} are the same as those accepted as architectural -extensions by the @option{-mcpu} commandline option. +extensions by the @option{-mcpu} command-line option. @code{.arch_extension} may be used multiple times to add or remove extensions incrementally to the architecture being compiled for. @@ -310,7 +310,7 @@ This directive switches to the @code{.bss} section. @cindex @code{.cpu} directive, AArch64 @item .cpu @var{name} Set the target processor. Valid values for @var{name} are the same as -those accepted by the @option{-mcpu=} command line option. +those accepted by the @option{-mcpu=} command-line option. @c DDDDDDDDDDDDDDDDDDDDDDDDDD diff --git a/gas/doc/c-alpha.texi b/gas/doc/c-alpha.texi index 8365e39..7b228ac 100644 --- a/gas/doc/c-alpha.texi +++ b/gas/doc/c-alpha.texi @@ -40,7 +40,7 @@ features specific to these formats are not yet documented. @c man begin OPTIONS @table @gcctabopt -@cindex @code{-m@var{cpu}} command line option, Alpha +@cindex @code{-m@var{cpu}} command-line option, Alpha @item -m@var{cpu} This option specifies the target processor. If an attempt is made to assemble an instruction which will not execute on the target processor, @@ -75,15 +75,15 @@ and existing practice within @command{MILO} (the Linux ARC bootloader), the numbered processor names (e.g.@: 21064) enable the processor-specific PALcode instructions, while the ``electro-vlasic'' names (e.g.@: @code{ev4}) do not. -@cindex @code{-mdebug} command line option, Alpha -@cindex @code{-no-mdebug} command line option, Alpha +@cindex @code{-mdebug} command-line option, Alpha +@cindex @code{-no-mdebug} command-line option, Alpha @item -mdebug @itemx -no-mdebug Enables or disables the generation of @code{.mdebug} encapsulation for stabs directives and procedure descriptors. The default is to automatically enable @code{.mdebug} when the first stabs directive is seen. -@cindex @code{-relax} command line option, Alpha +@cindex @code{-relax} command-line option, Alpha @item -relax This option forces all relocations to be put into the object file, instead of saving space and resolving some relocations at assembly time. Note that @@ -91,8 +91,8 @@ this option does not propagate all symbol arithmetic into the object file, because not all symbol arithmetic can be represented. However, the option can still be useful in specific applications. -@cindex @code{-replace} command line option, Alpha -@cindex @code{-noreplace} command line option, Alpha +@cindex @code{-replace} command-line option, Alpha +@cindex @code{-noreplace} command-line option, Alpha @item -replace @itemx -noreplace Enables or disables the optimization of procedure calls, both at assemblage @@ -100,20 +100,20 @@ and at link time. These options are only available for VMS targets and @code{-replace} is the default. See section 1.4.1 of the OpenVMS Linker Utility Manual. -@cindex @code{-g} command line option, Alpha +@cindex @code{-g} command-line option, Alpha @item -g This option is used when the compiler generates debug information. When @command{gcc} is using @command{mips-tfile} to generate debug information for ECOFF, local labels must be passed through to the object file. Otherwise this option has no effect. -@cindex @code{-G} command line option, Alpha +@cindex @code{-G} command-line option, Alpha @item -G@var{size} A local common symbol larger than @var{size} is placed in @code{.bss}, while smaller symbols are placed in @code{.sbss}. -@cindex @code{-F} command line option, Alpha -@cindex @code{-32addr} command line option, Alpha +@cindex @code{-F} command-line option, Alpha +@cindex @code{-32addr} command-line option, Alpha @item -F @itemx -32addr These options are ignored for backward compatibility. diff --git a/gas/doc/c-arc.texi b/gas/doc/c-arc.texi index 76eae3f..bce51d1 100644 --- a/gas/doc/c-arc.texi +++ b/gas/doc/c-arc.texi @@ -36,14 +36,14 @@ assembled, and generic constraints on the code generated: @table @code @item -mcpu=@var{cpu} -@cindex @code{-mcpu=@var{cpu}} command line option, ARC +@cindex @code{-mcpu=@var{cpu}} command-line option, ARC Set architecture type and register usage for @var{cpu}. There are also shortcut alias options available for backward compatibility and convenience. Supported values for @var{cpu} are @table @code -@cindex @code{mA6} command line option, ARC -@cindex @code{marc600} command line option, ARC +@cindex @code{mA6} command-line option, ARC +@cindex @code{marc600} command-line option, ARC @item arc600 Assemble for ARC 600. Aliases: @code{-mA6}, @code{-mARC600}. @@ -57,7 +57,7 @@ Assemble for ARC 600 with mul64 instructions. Assemble for ARC 600 with mul32x16 instructions. @item arc601 -@cindex @code{mARC601} command line option, ARC +@cindex @code{mARC601} command-line option, ARC Assemble for ARC 601. Alias: @code{-mARC601}. @item arc601_norm @@ -70,12 +70,12 @@ Assemble for ARC 601 with mul64 instructions. Assemble for ARC 601 with mul32x16 instructions. @item arc700 -@cindex @code{mA7} command line option, ARC -@cindex @code{mARC700} command line option, ARC +@cindex @code{mA7} command-line option, ARC +@cindex @code{mARC700} command-line option, ARC Assemble for ARC 700. Aliases: @code{-mA7}, @code{-mARC700}. @item arcem -@cindex @code{mEM} command line option, ARC +@cindex @code{mEM} command-line option, ARC Assemble for ARC EM. Aliases: @code{-mEM} @item em @@ -98,7 +98,7 @@ instructions. Assemble for QuarkSE-EM cpu. @item archs -@cindex @code{mHS} command line option, ARC +@cindex @code{mHS} command-line option, ARC Assemble for ARC HS. Aliases: @code{-mHS}, @code{-mav2hs}. @item hs @@ -114,7 +114,7 @@ Assemble for ARC HS38. Assemble for ARC HS38 with floating point support on. @item nps400 -@cindex @code{mnps400} command line option, ARC +@cindex @code{mnps400} command-line option, ARC Assemble for ARC 700 with NPS-400 extended instructions. @end table @@ -122,41 +122,41 @@ Assemble for ARC 700 with NPS-400 extended instructions. Note: the @code{.cpu} directive (@pxref{ARC Directives}) can to be used to select a core variant from within assembly code. -@cindex @code{-EB} command line option, ARC +@cindex @code{-EB} command-line option, ARC @item -EB This option specifies that the output generated by the assembler should be marked as being encoded for a big-endian processor. -@cindex @code{-EL} command line option, ARC +@cindex @code{-EL} command-line option, ARC @item -EL This option specifies that the output generated by the assembler should be marked as being encoded for a little-endian processor - this is the default. -@cindex @code{-mcode-density} command line option, ARC +@cindex @code{-mcode-density} command-line option, ARC @item -mcode-density This option turns on Code Density instructions. Only valid for ARC EM processors. -@cindex @code{-mrelax} command line option, ARC +@cindex @code{-mrelax} command-line option, ARC @item -mrelax Enable support for assembly-time relaxation. The assembler will replace a longer version of an instruction with a shorter one, whenever it is possible. -@cindex @code{-mnps400} command line option, ARC +@cindex @code{-mnps400} command-line option, ARC @item -mnps400 Enable support for NPS-400 extended instructions. -@cindex @code{-mspfp} command line option, ARC +@cindex @code{-mspfp} command-line option, ARC @item -mspfp Enable support for single-precision floating point instructions. -@cindex @code{-mdpfp} command line option, ARC +@cindex @code{-mdpfp} command-line option, ARC @item -mdpfp Enable support for double-precision floating point instructions. -@cindex @code{-mfpuda} command line option, ARC +@cindex @code{-mfpuda} command-line option, ARC @item -mfpuda Enable support for double-precision assist floating point instructions. Only valid for ARC EM processors. @@ -486,7 +486,7 @@ Assemble for ARC HS38 with floating point support on. @end table -Note: the @code{.cpu} directive overrides the command line option +Note: the @code{.cpu} directive overrides the command-line option @code{-mcpu=@var{cpu}}; a warning is emitted when the version is not consistent between the two. diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi index 4683b8a..d2f6fe1 100644 --- a/gas/doc/c-arm.texi +++ b/gas/doc/c-arm.texi @@ -32,7 +32,7 @@ @table @code -@cindex @code{-mcpu=} command line option, ARM +@cindex @code{-mcpu=} command-line option, ARM @item -mcpu=@var{processor}[+@var{extension}@dots{}] This option specifies the target processor. The assembler will issue an error message if an attempt is made to assemble an instruction which @@ -201,7 +201,7 @@ for v8-A architecture), and @code{xscale}. -@cindex @code{-march=} command line option, ARM +@cindex @code{-march=} command-line option, ARM @item -march=@var{architecture}[+@var{extension}@dots{}] This option specifies the target architecture. The assembler will issue an error message if an attempt is made to assemble an instruction which @@ -252,7 +252,7 @@ the setting for @code{-mcpu}. The architecture option can be extended with the same instruction set extension options as the @code{-mcpu} option. -@cindex @code{-mfpu=} command line option, ARM +@cindex @code{-mfpu=} command-line option, ARM @item -mfpu=@var{floating-point-format} This option specifies the floating point format to assemble for. The @@ -309,19 +309,19 @@ The default is dependent on the processor selected. For Architecture 5 or later, the default is to assemble for VFP instructions; for earlier architectures the default is to assemble for FPA instructions. -@cindex @code{-mthumb} command line option, ARM +@cindex @code{-mthumb} command-line option, ARM @item -mthumb This option specifies that the assembler should start assembling Thumb instructions; that is, it should behave as though the file starts with a @code{.code 16} directive. -@cindex @code{-mthumb-interwork} command line option, ARM +@cindex @code{-mthumb-interwork} command-line option, ARM @item -mthumb-interwork This option specifies that the output generated by the assembler should be marked as supporting interworking. It also affects the behaviour of the @code{ADR} and @code{ADRL} pseudo opcodes. -@cindex @code{-mimplicit-it} command line option, ARM +@cindex @code{-mimplicit-it} command-line option, ARM @item -mimplicit-it=never @itemx -mimplicit-it=always @itemx -mimplicit-it=arm @@ -339,15 +339,15 @@ If @code{thumb} is specified, such constructs cause a warning in ARM code and are accepted in Thumb-2 code. If you omit this option, the behavior is equivalent to @code{-mimplicit-it=arm}. -@cindex @code{-mapcs-26} command line option, ARM -@cindex @code{-mapcs-32} command line option, ARM +@cindex @code{-mapcs-26} command-line option, ARM +@cindex @code{-mapcs-32} command-line option, ARM @item -mapcs-26 @itemx -mapcs-32 These options specify that the output generated by the assembler should be marked as supporting the indicated version of the Arm Procedure. Calling Standard. -@cindex @code{-matpcs} command line option, ARM +@cindex @code{-matpcs} command-line option, ARM @item -matpcs This option specifies that the output generated by the assembler should be marked as supporting the Arm/Thumb Procedure Calling Standard. If @@ -355,18 +355,18 @@ enabled this option will cause the assembler to create an empty debugging section in the object file called .arm.atpcs. Debuggers can use this to determine the ABI being used by. -@cindex @code{-mapcs-float} command line option, ARM +@cindex @code{-mapcs-float} command-line option, ARM @item -mapcs-float This indicates the floating point variant of the APCS should be used. In this variant floating point arguments are passed in FP registers rather than integer registers. -@cindex @code{-mapcs-reentrant} command line option, ARM +@cindex @code{-mapcs-reentrant} command-line option, ARM @item -mapcs-reentrant This indicates that the reentrant variant of the APCS should be used. This variant supports position independent code. -@cindex @code{-mfloat-abi=} command line option, ARM +@cindex @code{-mfloat-abi=} command-line option, ARM @item -mfloat-abi=@var{abi} This option specifies that the output generated by the assembler should be marked as using specified floating point ABI. @@ -376,7 +376,7 @@ The following values are recognized: and @code{hard}. -@cindex @code{-eabi=} command line option, ARM +@cindex @code{-eabi=} command-line option, ARM @item -meabi=@var{ver} This option specifies which EABI version the produced object files should conform to. @@ -386,7 +386,7 @@ The following values are recognized: and @code{5}. -@cindex @code{-EB} command line option, ARM +@cindex @code{-EB} command-line option, ARM @item -EB This option specifies that the output generated by the assembler should be marked as being encoded for a big-endian processor. @@ -397,33 +397,33 @@ and little-endian instructions then it should be assembled with the the @option{--be8} option. This will reverse the endianness of the instructions back to little-endian, but leave the data as big-endian. -@cindex @code{-EL} command line option, ARM +@cindex @code{-EL} command-line option, ARM @item -EL This option specifies that the output generated by the assembler should be marked as being encoded for a little-endian processor. -@cindex @code{-k} command line option, ARM +@cindex @code{-k} command-line option, ARM @cindex PIC code generation for ARM @item -k This option specifies that the output of the assembler should be marked as position-independent code (PIC). -@cindex @code{--fix-v4bx} command line option, ARM +@cindex @code{--fix-v4bx} command-line option, ARM @item --fix-v4bx Allow @code{BX} instructions in ARMv4 code. This is intended for use with the linker option of the same name. -@cindex @code{-mwarn-deprecated} command line option, ARM +@cindex @code{-mwarn-deprecated} command-line option, ARM @item -mwarn-deprecated @itemx -mno-warn-deprecated Enable or disable warnings about using deprecated options or features. The default is to warn. -@cindex @code{-mccs} command line option, ARM +@cindex @code{-mccs} command-line option, ARM @item -mccs Turns on CodeComposer Studio assembly syntax compatibility mode. -@cindex @code{-mwarn-syms} command line option, ARM +@cindex @code{-mwarn-syms} command-line option, ARM @item -mwarn-syms @itemx -mno-warn-syms Enable or disable warnings about symbols that match the names of ARM @@ -624,7 +624,7 @@ boundary). This is for compatibility with ARM's own assembler. @cindex @code{.arch} directive, ARM @item .arch @var{name} Select the target architecture. Valid values for @var{name} are the same as -for the @option{-march} commandline option. +for the @option{-march} command-line option. Specifying @code{.arch} clears any previously selected architecture extensions. @@ -633,7 +633,7 @@ extensions. @item .arch_extension @var{name} Add or remove an architecture extension to the target architecture. Valid values for @var{name} are the same as those accepted as architectural -extensions by the @option{-mcpu} and @option{-march} commandline options. +extensions by the @option{-mcpu} and @option{-march} command-line options. @code{.arch_extension} may be used multiple times to add or remove extensions incrementally to the architecture being compiled for. @@ -663,7 +663,7 @@ selects Thumb, with the value 32 selecting ARM. @cindex @code{.cpu} directive, ARM @item .cpu @var{name} Select the target processor. Valid values for @var{name} are the same as -for the @option{-mcpu} commandline option. +for the @option{-mcpu} command-line option. Specifying @code{.cpu} clears any previously selected architecture extensions. @@ -771,7 +771,7 @@ target processor does not support those instructions @cindex @code{.fpu} directive, ARM @item .fpu @var{name} Select the floating-point unit to assemble for. Valid values for @var{name} -are the same as for the @option{-mfpu} commandline option. +are the same as for the @option{-mfpu} command-line option. @c GGGGGGGGGGGGGGGGGGGGGGGGGG @c HHHHHHHHHHHHHHHHHHHHHHHHHH diff --git a/gas/doc/c-avr.texi b/gas/doc/c-avr.texi index c827426..6fc669e 100644 --- a/gas/doc/c-avr.texi +++ b/gas/doc/c-avr.texi @@ -28,7 +28,7 @@ @table @code -@cindex @code{-mmcu=} command line option, AVR +@cindex @code{-mmcu=} command-line option, AVR @item -mmcu=@var{mcu} Specify ATMEL AVR instruction set or MCU type. @@ -128,34 +128,34 @@ atxmega128a1, atxmega128a1u, atxmega128a4u). Instruction set avrtiny is for the ATtiny4/5/9/10/20/40 microcontrollers. -@cindex @code{-mall-opcodes} command line option, AVR +@cindex @code{-mall-opcodes} command-line option, AVR @item -mall-opcodes Accept all AVR opcodes, even if not supported by @code{-mmcu}. -@cindex @code{-mno-skip-bug} command line option, AVR +@cindex @code{-mno-skip-bug} command-line option, AVR @item -mno-skip-bug This option disable warnings for skipping two-word instructions. -@cindex @code{-mno-wrap} command line option, AVR +@cindex @code{-mno-wrap} command-line option, AVR @item -mno-wrap This option reject @code{rjmp/rcall} instructions with 8K wrap-around. -@cindex @code{-mrmw} command line option, AVR +@cindex @code{-mrmw} command-line option, AVR @item -mrmw Accept Read-Modify-Write (@code{XCH,LAC,LAS,LAT}) instructions. -@cindex @code{-mlink-relax} command line option, AVR +@cindex @code{-mlink-relax} command-line option, AVR @item -mlink-relax Enable support for link-time relaxation. This is now on by default and this flag no longer has any effect. -@cindex @code{-mno-link-relax} command line option, AVR +@cindex @code{-mno-link-relax} command-line option, AVR @item -mno-link-relax Disable support for link-time relaxation. The assembler will resolve relocations when it can, and may be able to better compress some debug information. -@cindex @code{-mgcc-isr} command line option, AVR +@cindex @code{-mgcc-isr} command-line option, AVR @item -mgcc-isr Enable the @code{__gcc_isr} pseudo instruction. diff --git a/gas/doc/c-bfin.texi b/gas/doc/c-bfin.texi index 1df0a9f..51cdda1 100644 --- a/gas/doc/c-bfin.texi +++ b/gas/doc/c-bfin.texi @@ -29,7 +29,7 @@ @c man begin OPTIONS @table @gcctabopt -@cindex @code{-mcpu=} command line option, Blackfin +@cindex @code{-mcpu=} command-line option, Blackfin @item -mcpu=@var{processor}@r{[}-@var{sirevision}@r{]} This option specifies the target processor. The optional @var{sirevision} is not used in assembler. It's here such that GCC can easily pass down its @@ -72,12 +72,12 @@ recognized: and @code{bf592}. -@cindex @code{-mfdpic} command line option, Blackfin +@cindex @code{-mfdpic} command-line option, Blackfin @item -mfdpic Assemble for the FDPIC ABI. -@cindex @code{-mno-fdpic} command line option, Blackfin -@cindex @code{-mnopic} command line option, Blackfin +@cindex @code{-mno-fdpic} command-line option, Blackfin +@cindex @code{-mnopic} command-line option, Blackfin @item -mno-fdpic @itemx -mnopic Disable -mfdpic. diff --git a/gas/doc/c-cris.texi b/gas/doc/c-cris.texi index 6fc25f1..e77e33f 100644 --- a/gas/doc/c-cris.texi +++ b/gas/doc/c-cris.texi @@ -28,10 +28,10 @@ The CRIS version of @code{@value{AS}} has these machine-dependent command-line options. -@cindex @option{--emulation=criself} command line option, CRIS -@cindex @option{--emulation=crisaout} command line option, CRIS -@cindex CRIS @option{--emulation=criself} command line option -@cindex CRIS @option{--emulation=crisaout} command line option +@cindex @option{--emulation=criself} command-line option, CRIS +@cindex @option{--emulation=crisaout} command-line option, CRIS +@cindex CRIS @option{--emulation=criself} command-line option +@cindex CRIS @option{--emulation=crisaout} command-line option The format of the generated object files can be either ELF or a.out, specified by the command-line options @@ -40,10 +40,10 @@ The default is ELF (criself), unless @code{@value{AS}} has been configured specifically for a.out by using the configuration name @code{cris-axis-aout}. -@cindex @option{--underscore} command line option, CRIS -@cindex @option{--no-underscore} command line option, CRIS -@cindex CRIS @option{--underscore} command line option -@cindex CRIS @option{--no-underscore} command line option +@cindex @option{--underscore} command-line option, CRIS +@cindex @option{--no-underscore} command-line option, CRIS +@cindex CRIS @option{--underscore} command-line option +@cindex CRIS @option{--no-underscore} command-line option There are two different link-incompatible ELF object file variants for CRIS, for use in environments where symbols are expected to be prefixed by a leading @samp{_} character and for @@ -58,8 +58,8 @@ difference, the effect of this option is to parse register names differently (@pxref{crisnous}). The @option{--no-underscore} option makes a @samp{$} register prefix mandatory. -@cindex @option{--pic} command line option, CRIS -@cindex CRIS @option{--pic} command line option +@cindex @option{--pic} command-line option, CRIS +@cindex CRIS @option{--pic} command-line option @cindex Position-independent code, CRIS @cindex CRIS position-independent code The option @option{--pic} must be passed to @code{@value{AS}} in @@ -70,8 +70,8 @@ affect expansion of instructions. The expansion with faster) absolute addresses in those expansions. This option is only valid when generating ELF format object files. -@cindex @option{--march=@var{architecture}} command line option, CRIS -@cindex CRIS @option{--march=@var{architecture}} command line option +@cindex @option{--march=@var{architecture}} command-line option, CRIS +@cindex CRIS @option{--march=@var{architecture}} command-line option @cindex Architecture variant option, CRIS @cindex CRIS architecture variant option The option @option{--march=@var{architecture}} @@ -103,29 +103,29 @@ Only instructions with register names and addressing modes with opcodes common to the v10 and v32 are recognized. @end table -@cindex @option{-N} command line option, CRIS -@cindex CRIS @option{-N} command line option +@cindex @option{-N} command-line option, CRIS +@cindex CRIS @option{-N} command-line option When @option{-N} is specified, @code{@value{AS}} will emit a warning when a 16-bit branch instruction is expanded into a 32-bit multiple-instruction construct (@pxref{CRIS-Expand}). -@cindex @option{--no-mul-bug-abort} command line option, CRIS -@cindex @option{--mul-bug-abort} command line option, CRIS -@cindex CRIS @option{--no-mul-bug-abort} command line option -@cindex CRIS @option{--mul-bug-abort} command line option +@cindex @option{--no-mul-bug-abort} command-line option, CRIS +@cindex @option{--mul-bug-abort} command-line option, CRIS +@cindex CRIS @option{--no-mul-bug-abort} command-line option +@cindex CRIS @option{--mul-bug-abort} command-line option Some versions of the CRIS v10, for example in the Etrax 100 LX, contain a bug that causes destabilizing memory accesses when a multiply instruction is executed with certain values in the first operand just before a cache-miss. When the -@option{--mul-bug-abort} command line option is active (the +@option{--mul-bug-abort} command-line option is active (the default value), @code{@value{AS}} will refuse to assemble a file containing a multiply instruction at a dangerous offset, one that could be the last on a cache-line, or is in a section with insufficient alignment. This placement checking does not catch any case where the multiply instruction is dangerously placed because it is located in a delay-slot. The -@option{--mul-bug-abort} command line option turns off the +@option{--mul-bug-abort} command-line option turns off the checking. @node CRIS-Expand diff --git a/gas/doc/c-epiphany.texi b/gas/doc/c-epiphany.texi index b5b0cc6..8f533f0 100644 --- a/gas/doc/c-epiphany.texi +++ b/gas/doc/c-epiphany.texi @@ -30,12 +30,12 @@ architecture. @c man begin OPTIONS @table @gcctabopt -@cindex @code{-mepiphany} command line option, Epiphany +@cindex @code{-mepiphany} command-line option, Epiphany @item -mepiphany Specifies that the both 32 and 16 bit instructions are allowed. This is the default behavior. -@cindex @code{-mepiphany16} command line option, Epiphany +@cindex @code{-mepiphany16} command-line option, Epiphany @item -mepiphany16 Restricts the permitted instructions to just the 16 bit set. @end table diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 2390fa9..c3fce9e 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -596,7 +596,7 @@ line is treated as a comment, but in this case the line can also be a logical line number directive (@pxref{Comments}) or a preprocessor control command (@pxref{Preprocessing}). -If the @option{--divide} command line option has not been specified +If the @option{--divide} command-line option has not been specified then the @samp{/} character appearing anywhere on a line also introduces a line comment. diff --git a/gas/doc/c-ia64.texi b/gas/doc/c-ia64.texi index b571ec5..fc739b4 100644 --- a/gas/doc/c-ia64.texi +++ b/gas/doc/c-ia64.texi @@ -29,7 +29,7 @@ @cindex options for IA-64 @table @option -@cindex @code{-mconstant-gp} command line option, IA-64 +@cindex @code{-mconstant-gp} command-line option, IA-64 @item -mconstant-gp This option instructs the assembler to mark the resulting object file diff --git a/gas/doc/c-lm32.texi b/gas/doc/c-lm32.texi index 0d66e3c..058ca37 100644 --- a/gas/doc/c-lm32.texi +++ b/gas/doc/c-lm32.texi @@ -27,39 +27,39 @@ @table @code -@cindex @code{-mmultiply-enabled} command line option, LM32 +@cindex @code{-mmultiply-enabled} command-line option, LM32 @item -mmultiply-enabled Enable multiply instructions. -@cindex @code{-mdivide-enabled} command line option, LM32 +@cindex @code{-mdivide-enabled} command-line option, LM32 @item -mdivide-enabled Enable divide instructions. -@cindex @code{-mbarrel-shift-enabled} command line option, LM32 +@cindex @code{-mbarrel-shift-enabled} command-line option, LM32 @item -mbarrel-shift-enabled Enable barrel-shift instructions. -@cindex @code{-msign-extend-enabled} command line option, LM32 +@cindex @code{-msign-extend-enabled} command-line option, LM32 @item -msign-extend-enabled Enable sign extend instructions. -@cindex @code{-muser-enabled} command line option, LM32 +@cindex @code{-muser-enabled} command-line option, LM32 @item -muser-enabled Enable user defined instructions. -@cindex @code{-micache-enabled} command line option, LM32 +@cindex @code{-micache-enabled} command-line option, LM32 @item -micache-enabled Enable instruction cache related CSRs. -@cindex @code{-mdcache-enabled} command line option, LM32 +@cindex @code{-mdcache-enabled} command-line option, LM32 @item -mdcache-enabled Enable data cache related CSRs. -@cindex @code{-mbreak-enabled} command line option, LM32 +@cindex @code{-mbreak-enabled} command-line option, LM32 @item -mbreak-enabled Enable break instructions. -@cindex @code{-mall-enabled} command line option, LM32 +@cindex @code{-mall-enabled} command-line option, LM32 @item -mall-enabled Enable all instructions and CSRs. diff --git a/gas/doc/c-m32r.texi b/gas/doc/c-m32r.texi index 754164a..53950ca 100644 --- a/gas/doc/c-m32r.texi +++ b/gas/doc/c-m32r.texi @@ -53,7 +53,7 @@ microprocessor. @cindex M32R architecture options This option can be used to restore the assembler's default behaviour of assembling for the M32R microprocessor. This can be useful if the -default has been changed by a previous command line option. +default has been changed by a previous command-line option. @item -little @cindex @code{-little} option, M32R @@ -321,7 +321,7 @@ neg instruction and the input to the move instruction. @item instruction @samp{...} is for the M32RX only This message is produced when the assembler encounters an instruction which is only supported by the M32Rx processor, and the @samp{-m32rx} -command line flag has not been specified to allow assembly of such +command-line flag has not been specified to allow assembly of such instructions. @item unknown instruction @samp{...} @@ -331,7 +331,7 @@ which it does not recognize. @item only the NOP instruction can be issued in parallel on the m32r This message is produced when the assembler encounters a parallel instruction which does not involve a NOP instruction and the -@samp{-m32rx} command line flag has not been specified. Only the M32Rx +@samp{-m32rx} command-line flag has not been specified. Only the M32Rx processor is able to execute two instructions in parallel. @item instruction @samp{...} cannot be executed in parallel. diff --git a/gas/doc/c-m68k.texi b/gas/doc/c-m68k.texi index 2ef5e21..76c111f 100644 --- a/gas/doc/c-m68k.texi +++ b/gas/doc/c-m68k.texi @@ -31,7 +31,7 @@ dependent options: @table @samp -@cindex @samp{-march=} command line option, M680x0 +@cindex @samp{-march=} command-line option, M680x0 @item -march=@var{architecture} This option specifies a target architecture. The following architectures are recognized: @@ -49,20 +49,20 @@ architectures are recognized: @code{cfv4e}. -@cindex @samp{-mcpu=} command line option, M680x0 +@cindex @samp{-mcpu=} command-line option, M680x0 @item -mcpu=@var{cpu} This option specifies a target cpu. When used in conjunction with the @option{-march} option, the cpu must be within the specified architecture. Also, the generic features of the architecture are used for instruction generation, rather than those of the specific chip. -@cindex @samp{-m[no-]68851} command line option, M680x0 -@cindex @samp{-m[no-]68881} command line option, M680x0 -@cindex @samp{-m[no-]div} command line option, M680x0 -@cindex @samp{-m[no-]usp} command line option, M680x0 -@cindex @samp{-m[no-]float} command line option, M680x0 -@cindex @samp{-m[no-]mac} command line option, M680x0 -@cindex @samp{-m[no-]emac} command line option, M680x0 +@cindex @samp{-m[no-]68851} command-line option, M680x0 +@cindex @samp{-m[no-]68881} command-line option, M680x0 +@cindex @samp{-m[no-]div} command-line option, M680x0 +@cindex @samp{-m[no-]usp} command-line option, M680x0 +@cindex @samp{-m[no-]float} command-line option, M680x0 +@cindex @samp{-m[no-]mac} command-line option, M680x0 +@cindex @samp{-m[no-]emac} command-line option, M680x0 @item -m[no-]68851 @itemx -m[no-]68881 @itemx -m[no-]div @@ -446,7 +446,7 @@ This directive is identical to a @code{.space} directive. @cindex @code{arch} directive, M680x0 @item .arch @var{name} Select the target architecture and extension features. Valid values -for @var{name} are the same as for the @option{-march} command line +for @var{name} are the same as for the @option{-march} command-line option. This directive cannot be specified after any instructions have been assembled. If it is given multiple times, or in conjunction with the @option{-march} option, all uses must be for @@ -455,7 +455,7 @@ the same architecture and extension set. @cindex @code{cpu} directive, M680x0 @item .cpu @var{name} Select the target cpu. Valid values -for @var{name} are the same as for the @option{-mcpu} command line +for @var{name} are the same as for the @option{-mcpu} command-line option. This directive cannot be specified after any instructions have been assembled. If it is given multiple times, or in conjunction with the @option{-mopt} option, all uses must be for @@ -613,7 +613,7 @@ branch instructions allow both word and long displacements. @cindex line comment character, M680x0 @cindex comments, M680x0 Line comments are introduced by the @samp{|} character appearing -anywhere on a line, unless the @option{--bitwise-or} command line option +anywhere on a line, unless the @option{--bitwise-or} command-line option has been specified. An asterisk (@samp{*}) as the first character on a line marks the diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index 9cbfaf2..24f6843 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -522,7 +522,7 @@ for branches. By default @samp{-mno-ignore-branch-isa} is selected, causing any invalid branch requiring a transition between ISA modes to produce an error. -@cindex @option{-mnan=} command line option, MIPS +@cindex @option{-mnan=} command-line option, MIPS @item -mnan=@var{encoding} This option indicates whether the source code uses the IEEE 2008 NaN encoding (@option{-mnan=2008}) or the original MIPS encoding @@ -748,7 +748,7 @@ for the corresponding ISA level, from that point on in the assembly. @code{.set mips@var{n}} affects not only which instructions are permitted, but also how certain macros are expanded. @code{.set mips0} restores the ISA level to its original level: either the -level you selected with command line options, or the default for your +level you selected with command-line options, or the default for your configuration. You can use this feature to permit specific MIPS III instructions while assembling in 32 bit mode. Use this directive with care! @@ -758,7 +758,7 @@ care! The @code{.set arch=@var{cpu}} directive provides even finer control. It changes the effective CPU target and allows the assembler to use instructions specific to a particular CPU. All CPUs supported by the -@samp{-march} command line option are also selectable by this directive. +@samp{-march} command-line option are also selectable by this directive. The original value is restored by @code{.set arch=default}. The directive @code{.set mips16} puts the assembler into MIPS 16 mode, @@ -776,13 +776,13 @@ Traditional MIPS assemblers do not support this directive. @node MIPS assembly options @section Directives to control code generation -@cindex MIPS directives to override command line options +@cindex MIPS directives to override command-line options @kindex @code{.module} -The @code{.module} directive allows command line options to be set directly +The @code{.module} directive allows command-line options to be set directly from assembly. The format of the directive matches the @code{.set} directive but only those options which are relevant to a whole module are supported. The effect of a @code{.module} directive is the same as the -corresponding command line option. Where @code{.set} directives support +corresponding command-line option. Where @code{.set} directives support returning to a default then the @code{.module} directives do not as they define the defaults. @@ -873,7 +873,7 @@ other and must be tracked carefully. Traditionally the use of an explicit @code{.gnu_attribute 4, @var{n}} directive is used to indicate which ABI is in use by a specific module. -It was then left to the user to ensure that command line options and the +It was then left to the user to ensure that command-line options and the selected ABI were compatible with some potential for inconsistencies. @node MIPS FP ABI Variants @@ -933,7 +933,7 @@ of MIPS32r2. @cindex @code{.module fp=@var{nn}} directive, MIPS In order to simplify and add safety to the process of selecting the correct floating-point ABI, the assembler will automatically infer the -correct @code{.gnu_attribute 4, @var{n}} directive based on command line +correct @code{.gnu_attribute 4, @var{n}} directive based on command-line options and @code{.module} overrides. Where an explicit @code{.gnu_attribute 4, @var{n}} directive has been seen then a warning will be raised if it does not match an inferred setting. diff --git a/gas/doc/c-mmix.texi b/gas/doc/c-mmix.texi index 3ed6822..d10d750 100644 --- a/gas/doc/c-mmix.texi +++ b/gas/doc/c-mmix.texi @@ -27,25 +27,25 @@ @cindex MMIX options The MMIX version of @code{@value{AS}} has some machine-dependent options. -@cindex @samp{--fixed-special-register-names} command line option, MMIX +@cindex @samp{--fixed-special-register-names} command-line option, MMIX When @samp{--fixed-special-register-names} is specified, only the register names specified in @ref{MMIX-Regs} are recognized in the instructions @code{PUT} and @code{GET}. -@cindex @samp{--globalize-symbols} command line option, MMIX +@cindex @samp{--globalize-symbols} command-line option, MMIX You can use the @samp{--globalize-symbols} to make all symbols global. This option is useful when splitting up a @code{mmixal} program into several files. -@cindex @samp{--gnu-syntax} command line option, MMIX +@cindex @samp{--gnu-syntax} command-line option, MMIX The @samp{--gnu-syntax} turns off most syntax compatibility with @code{mmixal}. Its usability is currently doubtful. -@cindex @samp{--relax} command line option, MMIX +@cindex @samp{--relax} command-line option, MMIX The @samp{--relax} option is not fully supported, but will eventually make the object file prepared for linker relaxation. -@cindex @samp{--no-predefined-syms} command line option, MMIX +@cindex @samp{--no-predefined-syms} command-line option, MMIX If you want to avoid inadvertently calling a predefined symbol and would rather get an error, for example when using @code{@value{AS}} with a compiler or other machine-generated code, specify @@ -55,13 +55,13 @@ symbols, @samp{BIT} symbols, and @code{TRAP} symbols used in @code{mmix} ``system calls''. It also turns off predefined special-register names, except when used in @code{PUT} and @code{GET} instructions. -@cindex @samp{--no-expand} command line option, MMIX +@cindex @samp{--no-expand} command-line option, MMIX By default, some instructions are expanded to fit the size of the operand or an external symbol (@pxref{MMIX-Expand}). By passing @samp{--no-expand}, no such expansion will be done, instead causing errors at link time if the operand does not fit. -@cindex @samp{--no-merge-gregs} command line option, MMIX +@cindex @samp{--no-merge-gregs} command-line option, MMIX The @code{mmixal} documentation (@pxref{mmixsite}) specifies that global registers allocated with the @samp{GREG} directive (@pxref{MMIX-greg}) and initialized to the same non-zero value, will refer to the same global @@ -70,7 +70,7 @@ final addresses aren't known until link-time, but it will do an effort unless the @samp{--no-merge-gregs} option is specified. (Register merging isn't yet implemented in @code{@value{LD}}.) -@cindex @samp{-x} command line option, MMIX +@cindex @samp{-x} command-line option, MMIX @code{@value{AS}} will warn every time it expands an instruction to fit an operand unless the option @samp{-x} is specified. It is believed that this behaviour is more useful than just mimicking @code{mmixal}'s @@ -82,8 +82,8 @@ that at link stage can be contracted. (Though linker relaxation isn't yet implemented in @code{@value{LD}}.) The option @samp{-x} also implies @samp{--linker-allocated-gregs}. -@cindex @samp{--no-pushj-stubs} command line option, MMIX -@cindex @samp{--no-stubs} command line option, MMIX +@cindex @samp{--no-pushj-stubs} command-line option, MMIX +@cindex @samp{--no-stubs} command-line option, MMIX If instruction expansion is enabled, @code{@value{AS}} can expand a @samp{PUSHJ} instruction into a series of instructions. The shortest expansion is to not expand it, but just mark the call as redirectable to a @@ -97,7 +97,7 @@ then created at assembly-time. The option @samp{--no-stubs} is a synonym, intended for compatibility with future releases, where generation of stubs for other instructions may be implemented. -@cindex @samp{--linker-allocated-gregs} command line option, MMIX +@cindex @samp{--linker-allocated-gregs} command-line option, MMIX Usually a two-operand-expression (@pxref{GREG-base}) without a matching @samp{GREG} directive is treated as an error by @code{@value{AS}}. When the option @samp{--linker-allocated-gregs} is in effect, they are instead diff --git a/gas/doc/c-msp430.texi b/gas/doc/c-msp430.texi index bb491b7..8338e6d 100644 --- a/gas/doc/c-msp430.texi +++ b/gas/doc/c-msp430.texi @@ -83,7 +83,7 @@ changes the interrupt state (@code{EINT}, @code{DINT}, @code{BIC #8, SR}, @code{BIS #8, SR} or @code{MOV.W <>, SR}) must be followed by a NOP instruction in order to ensure the correct processing of interrupts. By default it is up to the programmer to -supply these NOP instructions, but this command line option enables +supply these NOP instructions, but this command-line option enables the automatic insertion by the assembler, if they are missing. @item -mN @@ -302,12 +302,12 @@ MSP 430 assemblers. @cindex @code{arch} directive, MSP 430 @item .arch Sets the target microcontroller in the same way as the @option{-mmcu} -command line option. +command-line option. @cindex @code{cpu} directive, MSP 430 @item .cpu Sets the target architecture in the same way as the @option{-mcpu} -command line option. +command-line option. @cindex @code{profiler} directive, MSP 430 @item .profiler diff --git a/gas/doc/c-mt.texi b/gas/doc/c-mt.texi index b25f50a..dd759fb 100644 --- a/gas/doc/c-mt.texi +++ b/gas/doc/c-mt.texi @@ -26,7 +26,7 @@ @table @code -@cindex @code{-march=} command line option, MT +@cindex @code{-march=} command-line option, MT @item -march=@var{processor} This option specifies the target processor. The assembler will issue an error message if an attempt is made to assemble an instruction which @@ -37,7 +37,7 @@ recognized: @code{ms1-16-003}, and @code{ms2}. -@cindex @code{-nosched} command line option, MT +@cindex @code{-nosched} command-line option, MT @item -nosched This option disables scheduling restriction checking. diff --git a/gas/doc/c-nios2.texi b/gas/doc/c-nios2.texi index 1895b40..a0f22f4 100644 --- a/gas/doc/c-nios2.texi +++ b/gas/doc/c-nios2.texi @@ -31,7 +31,7 @@ @c man begin OPTIONS @table @gcctabopt -@cindex @code{relax-section} command line option, Nios II +@cindex @code{relax-section} command-line option, Nios II @item -relax-section Replace identified out-of-range branches with PC-relative @code{jmp} sequences when possible. The generated code sequences are suitable @@ -39,26 +39,26 @@ for use in position-independent code, but there is a practical limit on the extended branch range because of the length of the sequences. This option is the default. -@cindex @code{relax-all} command line option, Nios II +@cindex @code{relax-all} command-line option, Nios II @item -relax-all Replace branch instructions not determinable to be in range and all call instructions with @code{jmp} and @code{callr} sequences (respectively). This option generates absolute relocations against the target symbols and is not appropriate for position-independent code. -@cindex @code{no-relax} command line option, Nios II +@cindex @code{no-relax} command-line option, Nios II @item -no-relax Do not replace any branches or calls. -@cindex @code{EB} command line option, Nios II +@cindex @code{EB} command-line option, Nios II @item -EB Generate big-endian output. -@cindex @code{EL} command line option, Nios II +@cindex @code{EL} command-line option, Nios II @item -EL Generate little-endian output. This is the default. -@cindex @code{march} command line option, Nios II +@cindex @code{march} command-line option, Nios II @item -march=@var{architecture} This option specifies the target architecture. The assembler issues an error message if an attempt is made to assemble an instruction which diff --git a/gas/doc/c-ppc.texi b/gas/doc/c-ppc.texi index 807b087..6f7b0f9 100644 --- a/gas/doc/c-ppc.texi +++ b/gas/doc/c-ppc.texi @@ -229,7 +229,7 @@ control command (@pxref{Preprocessing}). If the assembler has been configured for the ppc-*-solaris* target then the @samp{!} character also acts as a line comment character. -This can be disabled via the @option{-mno-solaris} command line +This can be disabled via the @option{-mno-solaris} command-line option. @cindex line separator, PowerPC diff --git a/gas/doc/c-pru.texi b/gas/doc/c-pru.texi index 208e199..0910b39 100644 --- a/gas/doc/c-pru.texi +++ b/gas/doc/c-pru.texi @@ -25,19 +25,19 @@ @c man begin OPTIONS @table @gcctabopt -@cindex @code{mlink-relax} command line option, PRU +@cindex @code{mlink-relax} command-line option, PRU @item -mlink-relax Assume that LD would optimize LDI32 instructions by checking the upper 16 bits of the @var{expression}. If they are all zeros, then LD would shorten the LDI32 instruction to a single LDI. In such case @code{@value{AS}} will output DIFF relocations for diff expressions. -@cindex @code{mno-link-relax} command line option, PRU +@cindex @code{mno-link-relax} command-line option, PRU @item -mno-link-relax Assume that LD would not optimize LDI32 instructions. As a consequence, DIFF relocations will not be emitted. -@cindex @code{mno-warn-regname-label} command line option, PRU +@cindex @code{mno-warn-regname-label} command-line option, PRU @item -mno-warn-regname-label Do not warn if a label name matches a register name. Usually assembler programmers will want this warning to be emitted. C compilers may want @@ -129,7 +129,7 @@ Create an unaligned constant 16 bytes in size. @cindex @code{set no_warn_regname_label} directive, PRU @item .set no_warn_regname_label Do not output warnings when a label name matches a register name. Equivalent -to passing the @code{-mno-warn-regname-label} command line option. +to passing the @code{-mno-warn-regname-label} command-line option. @end table diff --git a/gas/doc/c-rl78.texi b/gas/doc/c-rl78.texi index 62be228..1d64587 100644 --- a/gas/doc/c-rl78.texi +++ b/gas/doc/c-rl78.texi @@ -13,7 +13,7 @@ @cindex RL78 support @menu -* RL78-Opts:: RL78 Assembler Command Line Options +* RL78-Opts:: RL78 Assembler Command-line Options * RL78-Modifiers:: Symbolic Operand Modifiers * RL78-Directives:: Assembler Directives * RL78-Syntax:: Syntax @@ -107,7 +107,7 @@ In addition to the common directives, the RL78 adds these: @item .double Output a constant in ``double'' format, which is either a 32-bit or a 64-bit floating point value, depending upon the setting of the -@option{-m32bit-doubles}|@option{-m64bit-doubles} command line +@option{-m32bit-doubles}|@option{-m64bit-doubles} command-line option. @item .bss diff --git a/gas/doc/c-rx.texi b/gas/doc/c-rx.texi index ea523f1..b20fd09 100644 --- a/gas/doc/c-rx.texi +++ b/gas/doc/c-rx.texi @@ -13,7 +13,7 @@ @cindex RX support @menu -* RX-Opts:: RX Assembler Command Line Options +* RX-Opts:: RX Assembler Command-line Options * RX-Modifiers:: Symbolic Operand Modifiers * RX-Directives:: Assembler Directives * RX-Float:: Floating Point @@ -26,7 +26,7 @@ @cindex RX options The Renesas RX port of @code{@value{AS}} has a few target specific -command line options: +command-line options: @table @code @@ -218,7 +218,7 @@ The floating point formats generated by directives are these. @cindex @code{double} directive, RX @item .double -If the @option{-m64bit-doubles} command line option has been specified +If the @option{-m64bit-doubles} command-line option has been specified then then @code{double} directive generates @code{double} precision (64-bit) floating point constants, otherwise it generates @code{single} precision (32-bit) floating point constants. To force diff --git a/gas/doc/c-tic6x.texi b/gas/doc/c-tic6x.texi index 4622e18..8744100 100644 --- a/gas/doc/c-tic6x.texi +++ b/gas/doc/c-tic6x.texi @@ -28,7 +28,7 @@ @c man begin OPTIONS @table @gcctabopt -@cindex @code{-march=} command line option, TIC6X +@cindex @code{-march=} command-line option, TIC6X @item -march=@var{arch} Enable (only) instructions from architecture @var{arch}. By default, all instructions are permitted. @@ -36,8 +36,8 @@ all instructions are permitted. The following values of @var{arch} are accepted: @code{c62x}, @code{c64x}, @code{c64x+}, @code{c67x}, @code{c67x+}, @code{c674x}. -@cindex @code{-mdsbt} command line option, TIC6X -@cindex @code{-mno-dsbt} command line option, TIC6X +@cindex @code{-mdsbt} command-line option, TIC6X +@cindex @code{-mno-dsbt} command-line option, TIC6X @item -mdsbt @itemx -mno-dsbt The @option{-mdsbt} option causes the assembler to generate the @@ -47,7 +47,7 @@ default, causes the tag to have a value of 0, indicating that the code does not use DSBT addressing. The linker will emit a warning if objects of different type (DSBT and non-DSBT) are linked together. -@cindex @code{-mpid=} command line option, TIC6X +@cindex @code{-mpid=} command-line option, TIC6X @item -mpid=no @itemx -mpid=near @itemx -mpid=far @@ -61,8 +61,8 @@ addressing with GOT accesses using far DP addressing. The linker will emit a warning if objects built with different settings of this option are linked together. -@cindex @code{-mpic} command line option, TIC6X -@cindex @code{-mno-pic} command line option, TIC6X +@cindex @code{-mpic} command-line option, TIC6X +@cindex @code{-mno-pic} command-line option, TIC6X @item -mpic @itemx -mno-pic The @option{-mpic} option causes the assembler to generate the diff --git a/gas/doc/c-v850.texi b/gas/doc/c-v850.texi index bc30159..a29fa54 100644 --- a/gas/doc/c-v850.texi +++ b/gas/doc/c-v850.texi @@ -21,43 +21,43 @@ @code{@value{AS}} supports the following additional command-line options for the V850 processor family: -@cindex command line options, V850 -@cindex V850 command line options +@cindex command-line options, V850 +@cindex V850 command-line options @table @code -@cindex @code{-wsigned_overflow} command line option, V850 +@cindex @code{-wsigned_overflow} command-line option, V850 @item -wsigned_overflow Causes warnings to be produced when signed immediate values overflow the space available for then within their opcodes. By default this option is disabled as it is possible to receive spurious warnings due to using exact bit patterns as immediate constants. -@cindex @code{-wunsigned_overflow} command line option, V850 +@cindex @code{-wunsigned_overflow} command-line option, V850 @item -wunsigned_overflow Causes warnings to be produced when unsigned immediate values overflow the space available for then within their opcodes. By default this option is disabled as it is possible to receive spurious warnings due to using exact bit patterns as immediate constants. -@cindex @code{-mv850} command line option, V850 +@cindex @code{-mv850} command-line option, V850 @item -mv850 Specifies that the assembled code should be marked as being targeted at the V850 processor. This allows the linker to detect attempts to link such code with code assembled for other processors. -@cindex @code{-mv850e} command line option, V850 +@cindex @code{-mv850e} command-line option, V850 @item -mv850e Specifies that the assembled code should be marked as being targeted at the V850E processor. This allows the linker to detect attempts to link such code with code assembled for other processors. -@cindex @code{-mv850e1} command line option, V850 +@cindex @code{-mv850e1} command-line option, V850 @item -mv850e1 Specifies that the assembled code should be marked as being targeted at the V850E1 processor. This allows the linker to detect attempts to link such code with code assembled for other processors. -@cindex @code{-mv850any} command line option, V850 +@cindex @code{-mv850any} command-line option, V850 @item -mv850any Specifies that the assembled code should be marked as being targeted at the V850 processor but support instructions that are specific to the @@ -68,29 +68,29 @@ routines used by the code produced by GCC for all versions of the v850 architecture, together with support routines only used by the V850E architecture. -@cindex @code{-mv850e2} command line option, V850 +@cindex @code{-mv850e2} command-line option, V850 @item -mv850e2 Specifies that the assembled code should be marked as being targeted at the V850E2 processor. This allows the linker to detect attempts to link such code with code assembled for other processors. -@cindex @code{-mv850e2v3} command line option, V850 +@cindex @code{-mv850e2v3} command-line option, V850 @item -mv850e2v3 Specifies that the assembled code should be marked as being targeted at the V850E2V3 processor. This allows the linker to detect attempts to link such code with code assembled for other processors. -@cindex @code{-mv850e2v4} command line option, V850 +@cindex @code{-mv850e2v4} command-line option, V850 @item -mv850e2v4 This is an alias for @option{-mv850e3v5}. -@cindex @code{-mv850e3v5} command line option, V850 +@cindex @code{-mv850e3v5} command-line option, V850 @item -mv850e3v5 Specifies that the assembled code should be marked as being targeted at the V850E3V5 processor. This allows the linker to detect attempts to link such code with code assembled for other processors. -@cindex @code{-mrelax} command line option, V850 +@cindex @code{-mrelax} command-line option, V850 @item -mrelax Enables relaxation. This allows the .longcall and .longjump pseudo ops to be used in the assembler source code. These ops label sections @@ -98,34 +98,34 @@ of code which are either a long function call or a long branch. The assembler will then flag these sections of code and the linker will attempt to relax them. -@cindex @code{-mgcc-abi} command line option, V850 +@cindex @code{-mgcc-abi} command-line option, V850 @item -mgcc-abi Marks the generated object file as supporting the old GCC ABI. -@cindex @code{-mrh850-abi} command line option, V850 +@cindex @code{-mrh850-abi} command-line option, V850 @item -mrh850-abi Marks the generated object file as supporting the RH850 ABI. This is the default. -@cindex @code{-m8byte-align} command line option, V850 +@cindex @code{-m8byte-align} command-line option, V850 @item -m8byte-align Marks the generated object file as supporting a maximum 64-bits of alignment for variables defined in the source code. -@cindex @code{-m4byte-align} command line option, V850 +@cindex @code{-m4byte-align} command-line option, V850 @item -m4byte-align Marks the generated object file as supporting a maximum 32-bits of alignment for variables defined in the source code. This is the default. -@cindex @code{-msoft-float} command line option, V850 +@cindex @code{-msoft-float} command-line option, V850 @item -msoft-float Marks the generated object file as not using any floating point instructions - and hence can be linked with other V850 binaries that do or do not use floating point. This is the default for binaries for architectures earlier than the @code{e2v3}. -@cindex @code{-mhard-float} command line option, V850 +@cindex @code{-mhard-float} command-line option, V850 @item -mhard-float Marks the generated object file as one that uses floating point instructions - and hence can only be linked with other V850 binaries @@ -423,7 +423,7 @@ into register 6, provided that the label is located somewhere within +/- that the GP register contains a fixed address set to the address of the label called '__gp'. This can either be set up automatically by the linker, or specifically set by using the @samp{--defsym __gp=<value>} -command line option]. +command-line option]. @cindex @code{tdaoff} pseudo-op, V850 @item tdaoff() @@ -440,7 +440,7 @@ bytes of the address held in the EP register. [Note the linker assumes that the EP register contains a fixed address set to the address of the label called '__ep'. This can either be set up automatically by the linker, or specifically set by using the @samp{--defsym __ep=<value>} -command line option]. +command-line option]. @cindex @code{zdaoff} pseudo-op, V850 @item zdaoff() @@ -473,14 +473,14 @@ at the location labeled 'table_func1'. Indicates that the following sequence of instructions is a long call to function @code{name}. The linker will attempt to shorten this call sequence if @code{name} is within a 22bit offset of the call. Only -valid if the @code{-mrelax} command line switch has been enabled. +valid if the @code{-mrelax} command-line switch has been enabled. @cindex @code{longjump} pseudo-op, V850 @item .longjump @code{name} Indicates that the following sequence of instructions is a long jump to label @code{name}. The linker will attempt to shorten this code sequence if @code{name} is within a 22bit offset of the jump. Only -valid if the @code{-mrelax} command line switch has been enabled. +valid if the @code{-mrelax} command-line switch has been enabled. @end table diff --git a/gas/doc/c-vax.texi b/gas/doc/c-vax.texi index 0d72d4f..0dddbcd 100644 --- a/gas/doc/c-vax.texi +++ b/gas/doc/c-vax.texi @@ -50,7 +50,7 @@ These are obsolete options used to debug old assemblers. @item @code{-d} (Displacement size for JUMPs) This option expects a number following the @samp{-d}. Like options that expect filenames, the number may immediately follow the -@samp{-d} (old standard) or constitute the whole of the command line +@samp{-d} (old standard) or constitute the whole of the command-line argument that follows @samp{-d} (@sc{gnu} standard). @cindex @code{-V}, redundant on VAX diff --git a/gas/doc/c-visium.texi b/gas/doc/c-visium.texi index e35f174..d6b8e4c 100644 --- a/gas/doc/c-visium.texi +++ b/gas/doc/c-visium.texi @@ -30,7 +30,7 @@ The Visium assembler implements one machine-specific option: @c man begin OPTIONS @table @gcctabopt -@cindex @code{-mtune=@var{arch}} command line option, Visium +@cindex @code{-mtune=@var{arch}} command-line option, Visium @item -mtune=@var{arch} This option specifies the target architecture. If an attempt is made to assemble an instruction that will not execute on the target architecture, diff --git a/gas/doc/c-xstormy16.texi b/gas/doc/c-xstormy16.texi index e60264a..48b74e5 100644 --- a/gas/doc/c-xstormy16.texi +++ b/gas/doc/c-xstormy16.texi @@ -52,17 +52,17 @@ line. @cindex @code{16bit_pointers} directive, XStormy16 @item .16bit_pointers -Like the @option{--16bit-pointers} command line option this directive +Like the @option{--16bit-pointers} command-line option this directive indicates that the assembly code makes use of 16-bit pointers. @cindex @code{32bit_pointers} directive, XStormy16 @item .32bit_pointers -Like the @option{--32bit-pointers} command line option this directive +Like the @option{--32bit-pointers} command-line option this directive indicates that the assembly code makes use of 32-bit pointers. @cindex @code{.no_pointers} directive, XStormy16 @item .no_pointers -Like the @option{--no-pointers} command line option this directive +Like the @option{--no-pointers} command-line option this directive indicates that the assembly code does not makes use pointers. @end table diff --git a/gas/doc/c-xtensa.texi b/gas/doc/c-xtensa.texi index 488e11a..cf93c14 100644 --- a/gas/doc/c-xtensa.texi +++ b/gas/doc/c-xtensa.texi @@ -28,7 +28,7 @@ Reference Manual}. @end menu @node Xtensa Options -@section Command Line Options +@section Command-line Options @c man begin OPTIONS @table @gcctabopt @@ -296,7 +296,7 @@ call. This alignment has the potential to reduce branch penalties at some expense in code size. This optimization is enabled by default. You can disable it with the @samp{--no-target-@-align} command-line option (@pxref{Xtensa Options, -,Command Line Options}). +,Command-line Options}). The target alignment optimization is done without adding instructions that could increase the execution time of the program. If there are @@ -383,7 +383,7 @@ unconditional jump to a target that is out of range. Branch relaxation is enabled by default. It can be disabled by using underscore prefixes (@pxref{Xtensa Opcodes, ,Opcode Names}), the @samp{--no-transform} command-line option (@pxref{Xtensa Options, -,Command Line Options}), or the @code{no-transform} directive +,Command-line Options}), or the @code{no-transform} directive (@pxref{Transform Directive, ,transform}). @node Xtensa Call Relaxation @@ -509,7 +509,7 @@ will reach their targets once resolved. Jump relaxation is enabled by default because it does not affect code size or performance while the code itself is small. This relaxation may be disabled completely with @samp{--no-trampolines} or @samp{--no-transform} -command-line options (@pxref{Xtensa Options, ,Command Line Options}). +command-line options (@pxref{Xtensa Options, ,Command-line Options}). @node Xtensa Immediate Relaxation @subsection Other Immediate Field Relaxation @@ -519,7 +519,7 @@ command-line options (@pxref{Xtensa Options, ,Command Line Options}). The assembler normally performs the following other relaxations. They can be disabled by using underscore prefixes (@pxref{Xtensa Opcodes, ,Opcode Names}), the @samp{--no-transform} command-line option -(@pxref{Xtensa Options, ,Command Line Options}), or the +(@pxref{Xtensa Options, ,Command-line Options}), or the @code{no-transform} directive (@pxref{Transform Directive, ,transform}). @cindex @code{MOVI} instructions, relaxation @@ -770,7 +770,7 @@ the data in a literal pool. Literal pools are placed by default in separate literal sections; however, when using the @samp{--text-@-section-@-literals} -option (@pxref{Xtensa Options, ,Command Line Options}), the literal +option (@pxref{Xtensa Options, ,Command-line Options}), the literal pools for PC-relative mode @code{L32R} instructions are placed in the current section.@footnote{Literals for the @code{.init} and @code{.fini} sections are always placed in separate @@ -893,7 +893,7 @@ do not change. @xref{Literal Directive, ,literal}. If the @var{name} argument is omitted, the literal sections revert to the defaults. This directive has no effect when using the @samp{--text-@-section-@-literals} option (@pxref{Xtensa Options, -,Command Line Options}). +,Command-line Options}). @node Absolute Literals Directive @subsection absolute-literals diff --git a/gas/doc/c-z80.texi b/gas/doc/c-z80.texi index 3bc89e1..3287c68 100644 --- a/gas/doc/c-z80.texi +++ b/gas/doc/c-z80.texi @@ -30,7 +30,7 @@ The Zilog Z80 and Ascii R800 version of @code{@value{AS}} have a few machine dependent options. @table @option -@cindex @code{-z80} command line option, Z80 +@cindex @code{-z80} command-line option, Z80 @item -z80 Produce code for the Z80 processor. There are additional options to request warnings and error messages for undocumented instructions. @@ -56,7 +56,7 @@ Treat all undocumented z80-instructions as errors. @itemx -Fup Treat undocumented z80-instructions that do not work on R800 as errors. -@cindex @code{-r800} command line option, Z80 +@cindex @code{-r800} command-line option, Z80 @item -r800 Produce code for the R800 processor. The assembler does not support undocumented instructions for the R800. diff --git a/gas/doc/c-z8k.texi b/gas/doc/c-z8k.texi index d80a828..a6c08ae 100644 --- a/gas/doc/c-z8k.texi +++ b/gas/doc/c-z8k.texi @@ -36,11 +36,11 @@ for a list of other Z8000 specific assembler directives. @cindex Z8000 options @cindex options, Z8000 @table @option -@cindex @code{-z8001} command line option, Z8000 +@cindex @code{-z8001} command-line option, Z8000 @item -z8001 Generate segmented code by default. -@cindex @code{-z8002} command line option, Z8000 +@cindex @code{-z8002} command-line option, Z8000 @item -z8002 Generate unsegmented code by default. @end table diff --git a/gas/doc/internals.texi b/gas/doc/internals.texi index 93352ec..f58ae8b 100644 --- a/gas/doc/internals.texi +++ b/gas/doc/internals.texi @@ -1224,7 +1224,7 @@ the relax table. @item LINKER_RELAXING_SHRINKS_ONLY @cindex LINKER_RELAXING_SHRINKS_ONLY If you define this macro, and the global variable @samp{linkrelax} is set -(because of a command line option, or unconditionally in @code{md_begin}), a +(because of a command-line option, or unconditionally in @code{md_begin}), a @samp{.align} directive will cause extra space to be allocated. The linker can then discard this space when relaxing the section. @@ -1588,7 +1588,7 @@ if it is necessary to add object file format specific code to the CPU file. @item obj_begin If you define this macro, GAS will call it at the start of the assembly, after -the command line arguments have been parsed and all the machine independent +the command-line arguments have been parsed and all the machine independent initializations have been completed. @item obj_app_file |