Annotate sparc objects with cpu hardware capabilities used.

bfd/

	* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): New.
	* elfxx-sparc.h: Declare it.
	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Call it.
	* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.

binutils/

	* readelf.c (display_sparc_hwcaps): New.
	(display_sparc_gnu_attribute): New.
	(process_sparc_specific): New.
	(process_arch_specific): When EM_SPARC, EM_SPARC32PLUS,
	or EM_SPARCV9 invoke process_sparc_specific.

gas/

	* config/tc-sparc.c (hwcap_seen): New bitmask, defined when
	not TE_SOLARIS.
	(sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
	sparc_opcode->flags of instruction into hwcap_seen.
	(sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
	hwcap_seen is non-zero and not TE_SOLARIS.

gas/testsuite/

	* gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic.
	* gas/sparc/hpcvis3.d: Likewise.

include/elf/

	* sparc.h (Tag_GNU_Sparc_HWCAPS): New object attribute.
	(ELF_SPARC_HWCAP_*): New HWCAPS bitmask values.

include/opcode/

	* sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int.
	(F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
	F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
	F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits.

opcodes/

	* sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag
	bits.  Fix "fchksm16" mnemonic.

5 files changed, 71 insertions, 3 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index a48e187..46593cb 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2011-09-21  David S. Miller  <davem@davemloft.net>
+
+	* config/tc-sparc.c (hwcap_seen): New bitmask, defined when
+	not TE_SOLARIS.
+	(sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
+	sparc_opcode->flags of instruction into hwcap_seen.
+	(sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
+	hwcap_seen is non-zero and not TE_SOLARIS.
+
 2011-09-19  Tristan Gingold  <gingold@adacore.com>
 
 	* config/tc-alpha.c (insert_operand): Call as_bad_value_out_of_range
diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c
index be8d987..974524b 100644
--- a/gas/config/tc-sparc.c
+++ b/gas/config/tc-sparc.c
@@ -1,6 +1,7 @@
 /* tc-sparc.c -- Assemble for the SPARC
    Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
+   2011
    Free Software Foundation, Inc.
    This file is part of GAS, the GNU Assembler.
 
@@ -75,6 +76,12 @@ static int default_arch_size;
 /* The currently selected v9 memory model.  Currently only used for
    ELF.  */
 static enum { MM_TSO, MM_PSO, MM_RMO } sparc_memory_model = MM_RMO;
+
+#ifndef TE_SOLARIS
+/* Bitmask of instruction types seen so far, used to populate the
+   GNU attributes section with hwcap information.  */
+static int hwcap_seen;
+#endif
 #endif
 
 static int architecture_requested;
@@ -915,6 +922,48 @@ sparc_md_end (void)
       default: break;
       }
   bfd_set_arch_mach (stdoutput, bfd_arch_sparc, mach);
+
+#if defined(OBJ_ELF) && !defined(TE_SOLARIS)
+  if (hwcap_seen)
+    {
+      int bits = 0;
+
+      if (hwcap_seen & F_MUL32)
+	bits |= ELF_SPARC_HWCAP_MUL32;
+      if (hwcap_seen & F_DIV32)
+	bits |= ELF_SPARC_HWCAP_DIV32;
+      if (hwcap_seen & F_FSMULD)
+	bits |= ELF_SPARC_HWCAP_FSMULD;
+      if (hwcap_seen & F_V8PLUS)
+	bits |= ELF_SPARC_HWCAP_V8PLUS;
+      if (hwcap_seen & F_POPC)
+	bits |= ELF_SPARC_HWCAP_POPC;
+      if (hwcap_seen & F_VIS)
+	bits |= ELF_SPARC_HWCAP_VIS;
+      if (hwcap_seen & F_VIS2)
+	bits |= ELF_SPARC_HWCAP_VIS2;
+      if (hwcap_seen & F_ASI_BLK_INIT)
+	bits |= ELF_SPARC_HWCAP_ASI_BLK_INIT;
+      if (hwcap_seen & F_FMAF)
+	bits |= ELF_SPARC_HWCAP_FMAF;
+      if (hwcap_seen & F_VIS3)
+	bits |= ELF_SPARC_HWCAP_VIS3;
+      if (hwcap_seen & F_HPC)
+	bits |= ELF_SPARC_HWCAP_HPC;
+      if (hwcap_seen & F_RANDOM)
+	bits |= ELF_SPARC_HWCAP_RANDOM;
+      if (hwcap_seen & F_TRANS)
+	bits |= ELF_SPARC_HWCAP_TRANS;
+      if (hwcap_seen & F_FJFMAU)
+	bits |= ELF_SPARC_HWCAP_FJFMAU;
+      if (hwcap_seen & F_IMA)
+	bits |= ELF_SPARC_HWCAP_IMA;
+      if (hwcap_seen & F_ASI_CACHE_SPARING)
+	bits |= ELF_SPARC_HWCAP_ASI_CACHE_SPARING;
+
+      bfd_elf_add_obj_attr_int (stdoutput, OBJ_ATTR_GNU, Tag_GNU_Sparc_HWCAPS, bits);
+    }
+#endif
 }
 
 /* Return non-zero if VAL is in the range -(MAX+1) to MAX.  */
@@ -2743,7 +2792,12 @@ sparc_ip (char *str, const struct sparc_opcode **pinsn)
 	{
 	  /* We have a match.  Now see if the architecture is OK.  */
 	  int needed_arch_mask = insn->architecture;
+#if defined(OBJ_ELF) && !defined(TE_SOLARIS)
+	  int hwcaps = insn->flags & F_HWCAP_MASK;
 
+	  if (hwcaps)
+		  hwcap_seen |= hwcaps;
+#endif
 	  if (v9_arg_p)
 	    {
 	      needed_arch_mask &=
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index c01d393..da7d354 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2011-09-21  David S. Miller  <davem@davemloft.net>
+
+	* gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic.
+	* gas/sparc/hpcvis3.d: Likewise.
+
 2011-09-08  Mark Fortescue <mark@mtfhpc.demon.co.uk>
 
 	* gas/sparc/imm-plus-rreg.[sd]: New test.
diff --git a/gas/testsuite/gas/sparc/hpcvis3.d b/gas/testsuite/gas/sparc/hpcvis3.d
index cc99fc5..d44b13b 100644
--- a/gas/testsuite/gas/sparc/hpcvis3.d
+++ b/gas/testsuite/gas/sparc/hpcvis3.d
@@ -58,7 +58,7 @@ Disassembly of section .text:
   c0:	83 b4 47 f3 	pdistn  %f48, %f50, %g1
   c4:	af b4 c8 15 	fmean16  %f50, %f52, %f54
   c8:	b3 b5 48 57 	fpadd64  %f52, %f54, %f56
-  cc:	b7 b5 c8 99 	fchksum16  %f54, %f56, %f58
+  cc:	b7 b5 c8 99 	fchksm16  %f54, %f56, %f58
   d0:	bb b6 48 db 	fpsub64  %f56, %f58, %f60
   d4:	bf b6 cb 1d 	fpadds16  %f58, %f60, %f62
   d8:	8d b0 8b 24 	fpadds16s  %f2, %f4, %f6
diff --git a/gas/testsuite/gas/sparc/hpcvis3.s b/gas/testsuite/gas/sparc/hpcvis3.s
index da09ffd..8da08f4 100644
--- a/gas/testsuite/gas/sparc/hpcvis3.s
+++ b/gas/testsuite/gas/sparc/hpcvis3.s
@@ -51,7 +51,7 @@
 	pdistn	%f48, %f50, %g1
 	fmean16	%f50, %f52, %f54
 	fpadd64	%f52, %f54, %f56
-	fchksum16 %f54, %f56, %f58
+	fchksm16 %f54, %f56, %f58
 	fpsub64	%f56, %f58, %f60
 	fpadds16 %f58, %f60, %f62
 	fpadds16s %f2, %f4, %f6