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author | Jim Lin <jim@andestech.com> | 2024-10-28 09:46:32 +0800 |
---|---|---|
committer | Nelson Chu <nelson@rivosinc.com> | 2024-10-28 11:13:44 +0800 |
commit | 917ed12066382c48459f85124cbeca1286c3bb53 (patch) | |
tree | deb84df0ed7d8a9fdaa090529ee7534df353bc10 /gas | |
parent | b391a8b0439a55dd0b56ac66f1280d48dd2c1039 (diff) | |
download | binutils-917ed12066382c48459f85124cbeca1286c3bb53.zip binutils-917ed12066382c48459f85124cbeca1286c3bb53.tar.gz binutils-917ed12066382c48459f85124cbeca1286c3bb53.tar.bz2 |
RISC-V: Fix typo in gas/testsuite/gas/riscv/mapping.s
gas/
* gas/riscv/mapping.s: Fix typo.
* gas/riscv/mapping-dis.d: Fix typo.
* gas/riscv/mapping-symbols.d. Fix typo.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/testsuite/gas/riscv/mapping-dis.d | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/mapping-symbols.d | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/mapping.s | 2 |
3 files changed, 6 insertions, 6 deletions
diff --git a/gas/testsuite/gas/riscv/mapping-dis.d b/gas/testsuite/gas/riscv/mapping-dis.d index b1a26fb..133843a 100644 --- a/gas/testsuite/gas/riscv/mapping-dis.d +++ b/gas/testsuite/gas/riscv/mapping-dis.d @@ -11,7 +11,7 @@ Disassembly of section .text.cross.section.A: [ ]+[0-9a-f]+:[ ]+4505[ ]+li[ ]+a0,1 [ ]+[0-9a-f]+:[ ]+bffd[ ]+j[ ]+0 <funcA> -Disassembly of section .text.corss.section.B: +Disassembly of section .text.cross.section.B: 0+000 <funcB>: [ ]+[0-9a-f]+:[ ]+4509[ ]+li[ ]+a0,2 diff --git a/gas/testsuite/gas/riscv/mapping-symbols.d b/gas/testsuite/gas/riscv/mapping-symbols.d index 6af825d..057454b 100644 --- a/gas/testsuite/gas/riscv/mapping-symbols.d +++ b/gas/testsuite/gas/riscv/mapping-symbols.d @@ -10,9 +10,9 @@ SYMBOL TABLE: 0+00 l d .bss 0+00 .bss 0+00 l d .text.cross.section.A 0+00 .text.cross.section.A 0+00 l .text.cross.section.A 0+00 \$xrv32i2p1_c2p0 -0+00 l d .text.corss.section.B 0+00 .text.corss.section.B -0+00 l .text.corss.section.B 0+00 \$xrv32i2p1_c2p0 -0+02 l .text.corss.section.B 0+00 \$xrv32i2p1 +0+00 l d .text.cross.section.B 0+00 .text.cross.section.B +0+00 l .text.cross.section.B 0+00 \$xrv32i2p1_c2p0 +0+02 l .text.cross.section.B 0+00 \$xrv32i2p1 0+00 l d .text.data 0+00 .text.data 0+00 l .text.data 0+00 \$d 0+08 l .text.data 0+00 \$xrv32i2p1_c2p0 @@ -49,4 +49,4 @@ SYMBOL TABLE: 0+02 l .text.odd.align.start.data 0+00 \$xrv32i2p1_c2p0 0+00 l d .riscv.attributes 0+00 .riscv.attributes 0+00 g .text.cross.section.A 0+00 funcA -0+00 g .text.corss.section.B 0+00 funcB +0+00 g .text.cross.section.B 0+00 funcB diff --git a/gas/testsuite/gas/riscv/mapping.s b/gas/testsuite/gas/riscv/mapping.s index 6882a9e..0382cfc 100644 --- a/gas/testsuite/gas/riscv/mapping.s +++ b/gas/testsuite/gas/riscv/mapping.s @@ -7,7 +7,7 @@ funcA: addi a0, zero, 1 # rv32i .option arch, +c j funcA # rv32ic -.section .text.corss.section.B, "ax" +.section .text.cross.section.B, "ax" .globl funcB funcB: addi a0, zero, 2 # rv32ic, need to be added since start of section |