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author | Jan Beulich <jbeulich@suse.com> | 2022-07-18 11:20:44 +0200 |
---|---|---|
committer | Jan Beulich <jbeulich@suse.com> | 2022-07-18 11:20:44 +0200 |
commit | 7e864bf71d55626dce94df26ebaf11f65b4d7b65 (patch) | |
tree | 92e7540faf38e783d798f2430f438d1f230ce1b5 /gas | |
parent | 37cea58867dd1d0df263e82670fd2e7607539d84 (diff) | |
download | binutils-7e864bf71d55626dce94df26ebaf11f65b4d7b65.zip binutils-7e864bf71d55626dce94df26ebaf11f65b4d7b65.tar.gz binutils-7e864bf71d55626dce94df26ebaf11f65b4d7b65.tar.bz2 |
x86: correct VMOVSH attributes
Both forms were missing VexW0 (thus allowing Evex.W=1 to be encoded by
suitable means, which would cause #UD). The memory operand form further
was using the wrong Masking value, thus allowing zeroing-masking to be
encoded for the store form (which would again cause #UD).
Diffstat (limited to 'gas')
-rw-r--r-- | gas/testsuite/gas/i386/evex-wig.s | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/evex-wig1-intel.d | 9 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/evex-wig1.d | 9 |
3 files changed, 30 insertions, 0 deletions
diff --git a/gas/testsuite/gas/i386/evex-wig.s b/gas/testsuite/gas/i386/evex-wig.s index df73c78..de8c16c 100644 --- a/gas/testsuite/gas/i386/evex-wig.s +++ b/gas/testsuite/gas/i386/evex-wig.s @@ -62,6 +62,18 @@ _start: {evex} vpinsrw $0, %eax, %xmm0, %xmm0 {evex} vpinsrw $0, 2(%eax), %xmm0, %xmm0 + vmovss %xmm0, %xmm0, %xmm0{%k7} + vmovss (%eax), %xmm0{%k7} + vmovss %xmm0, (%eax){%k7} + + vmovsd %xmm0, %xmm0, %xmm0{%k7} + vmovsd (%eax), %xmm0{%k7} + vmovsd %xmm0, (%eax){%k7} + + vmovsh %xmm0, %xmm0, %xmm0{%k7} + vmovsh (%eax), %xmm0{%k7} + vmovsh %xmm0, (%eax){%k7} + vpmovsxbd %xmm5, %zmm6{%k7} # AVX512 vpmovsxbd %xmm5, %zmm6{%k7}{z} # AVX512 vpmovsxbd (%ecx), %zmm6{%k7} # AVX512 diff --git a/gas/testsuite/gas/i386/evex-wig1-intel.d b/gas/testsuite/gas/i386/evex-wig1-intel.d index 0bf2be8..202c4f5 100644 --- a/gas/testsuite/gas/i386/evex-wig1-intel.d +++ b/gas/testsuite/gas/i386/evex-wig1-intel.d @@ -45,6 +45,15 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 f3 fd 08 22 40 01 00 vpinsrd xmm0,xmm0,DWORD PTR \[eax\+0x4\],0x0 [ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw xmm0,xmm0,eax,0x0 [ ]*[a-f0-9]+: 62 f1 fd 08 c4 40 01 00 vpinsrw xmm0,xmm0,WORD PTR \[eax\+0x2\],0x0 +[ ]*[a-f0-9]+: 62 f1 7e 0f 10 c0 vmovss xmm0\{k7\},xmm0,xmm0 +[ ]*[a-f0-9]+: 62 f1 7e 0f 10 00 vmovss xmm0\{k7\},DWORD PTR \[eax\] +[ ]*[a-f0-9]+: 62 f1 7e 0f 11 00 vmovss DWORD PTR \[eax\]\{k7\},xmm0 +[ ]*[a-f0-9]+: 62 f1 ff 0f 10 c0 vmovsd xmm0\{k7\},xmm0,xmm0 +[ ]*[a-f0-9]+: 62 f1 ff 0f 10 00 vmovsd xmm0\{k7\},QWORD PTR \[eax\] +[ ]*[a-f0-9]+: 62 f1 ff 0f 11 00 vmovsd QWORD PTR \[eax\]\{k7\},xmm0 +[ ]*[a-f0-9]+: 62 f5 7e 0f 10 c0 vmovsh xmm0\{k7\},xmm0,xmm0 +[ ]*[a-f0-9]+: 62 f5 7e 0f 10 00 vmovsh xmm0\{k7\},WORD PTR \[eax\] +[ ]*[a-f0-9]+: 62 f5 7e 0f 11 00 vmovsh WORD PTR \[eax\]\{k7\},xmm0 [ ]*[a-f0-9]+: 62 f2 fd 4f 21 f5 vpmovsxbd zmm6\{k7\},xmm5 [ ]*[a-f0-9]+: 62 f2 fd cf 21 f5 vpmovsxbd zmm6\{k7\}\{z\},xmm5 [ ]*[a-f0-9]+: 62 f2 fd 4f 21 31 vpmovsxbd zmm6\{k7\},XMMWORD PTR \[ecx\] diff --git a/gas/testsuite/gas/i386/evex-wig1.d b/gas/testsuite/gas/i386/evex-wig1.d index def41b3..0a9a534 100644 --- a/gas/testsuite/gas/i386/evex-wig1.d +++ b/gas/testsuite/gas/i386/evex-wig1.d @@ -45,6 +45,15 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 f3 fd 08 22 40 01 00 vpinsrd \$0x0,0x4\(%eax\),%xmm0,%xmm0 [ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0 [ ]*[a-f0-9]+: 62 f1 fd 08 c4 40 01 00 vpinsrw \$0x0,0x2\(%eax\),%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f1 7e 0f 10 c0 vmovss %xmm0,%xmm0,%xmm0\{%k7\} +[ ]*[a-f0-9]+: 62 f1 7e 0f 10 00 vmovss \(%eax\),%xmm0\{%k7\} +[ ]*[a-f0-9]+: 62 f1 7e 0f 11 00 vmovss %xmm0,\(%eax\)\{%k7\} +[ ]*[a-f0-9]+: 62 f1 ff 0f 10 c0 vmovsd %xmm0,%xmm0,%xmm0\{%k7\} +[ ]*[a-f0-9]+: 62 f1 ff 0f 10 00 vmovsd \(%eax\),%xmm0\{%k7\} +[ ]*[a-f0-9]+: 62 f1 ff 0f 11 00 vmovsd %xmm0,\(%eax\)\{%k7\} +[ ]*[a-f0-9]+: 62 f5 7e 0f 10 c0 vmovsh %xmm0,%xmm0,%xmm0\{%k7\} +[ ]*[a-f0-9]+: 62 f5 7e 0f 10 00 vmovsh \(%eax\),%xmm0\{%k7\} +[ ]*[a-f0-9]+: 62 f5 7e 0f 11 00 vmovsh %xmm0,\(%eax\)\{%k7\} [ ]*[a-f0-9]+: 62 f2 fd 4f 21 f5 vpmovsxbd %xmm5,%zmm6\{%k7\} [ ]*[a-f0-9]+: 62 f2 fd cf 21 f5 vpmovsxbd %xmm5,%zmm6\{%k7\}\{z\} [ ]*[a-f0-9]+: 62 f2 fd 4f 21 31 vpmovsxbd \(%ecx\),%zmm6\{%k7\} |