bfd/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* cpu-ia64-opc.c (ins_immu5b): New.
	(ext_immu5b): Likewise.
	(elf64_ia64_operands): Add IMMU5b.

gas/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.

gas/testsuite/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/opc-i.s: Add tests for tf.
	* gas/ia64/pseudo.s: Likewise.
	* gas/ia64/opc-i.d: Updated.
	* gas/ia64/pseudo.d: Likewise.

include/opcode/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.

opcodes/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.

7 files changed, 115 insertions, 3 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index bf47c39..d672915 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,9 @@
 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
+
+2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* config/tc-ia64.c: Update copyright years.
 
 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
diff --git a/gas/config/tc-ia64.c b/gas/config/tc-ia64.c
index 0bb3adb..ec6bd61 100644
--- a/gas/config/tc-ia64.c
+++ b/gas/config/tc-ia64.c
@@ -5914,6 +5914,17 @@ operand_match (idesc, index, e)
 	return OPERAND_MATCH;
       break;
 
+    case IA64_OPND_IMMU5b:
+      if (e->X_op == O_constant)
+	{
+	  val = e->X_add_number;
+	  if (val >= 32 && val <= 63)
+	    return OPERAND_MATCH;
+	  else
+	    return OPERAND_OUT_OF_RANGE;
+	}
+      break;
+
     case IA64_OPND_CCNT5:
     case IA64_OPND_CNT5:
     case IA64_OPND_CNT6:
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d6f6784..3e6d743 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/ia64/opc-i.s: Add tests for tf.
+	* gas/ia64/pseudo.s: Likewise.
+	* gas/ia64/opc-i.d: Updated.
+	* gas/ia64/pseudo.d: Likewise.
+
 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/ia64/dv-raw-err.s: Add check for vmsw.0.
diff --git a/gas/testsuite/gas/ia64/opc-i.d b/gas/testsuite/gas/ia64/opc-i.d
index 0bbc2e1..175e07a 100644
--- a/gas/testsuite/gas/ia64/opc-i.d
+++ b/gas/testsuite/gas/ia64/opc-i.d
@@ -259,6 +259,54 @@ Disassembly of section \.text:
  ab0:	00 00 00 00 01 c0 	\[MII\]       nop\.m 0x0
  ab6:	01 00 00 03 80 03 	      \(p07\) hint\.i 0x0
  abc:	00 00 06 00       	      \(p07\) hint\.i 0x0
- ac0:	0d 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
- ac6:	00 00 00 02 80 e3 	            nop\.f 0x0
- acc:	ff ff 07 08       	      \(p07\) hint\.i 0x1fffff;;
+ ac0:	00 00 00 00 01 c0 	\[MII\]       nop\.m 0x0
+ ac6:	f1 ff ff 03 04 40 	      \(p07\) hint\.i 0x1fffff
+ acc:	f0 04 0c 50       	            tf\.z p2,p3=39
+ ad0:	00 00 00 00 01 00 	\[MII\]       nop\.m 0x0
+ ad6:	20 7c 02 06 28 40 	            tf\.z\.unc p2,p3=39
+ adc:	f0 04 0c 58       	            tf\.z\.and p2,p3=39
+ ae0:	00 00 00 00 01 00 	\[MII\]       nop\.m 0x0
+ ae6:	20 78 02 86 28 40 	            tf\.z\.or p2,p3=39
+ aec:	f0 04 0c 59       	            tf\.z\.or\.andcm p2,p3=39
+ af0:	00 00 00 00 01 00 	\[MII\]       nop\.m 0x0
+ af6:	30 7c 02 84 28 60 	            tf\.nz\.or p3,p2=39
+ afc:	f8 04 08 58       	            tf\.nz\.and p3,p2=39
+ b00:	00 00 00 00 01 00 	\[MII\]       nop\.m 0x0
+ b06:	30 7c 02 84 2c 60 	            tf\.nz\.or\.andcm p3,p2=39
+ b0c:	f0 04 08 50       	            tf\.z p3,p2=39
+ b10:	00 00 00 00 01 00 	\[MII\]       nop\.m 0x0
+ b16:	30 7c 02 04 28 40 	            tf\.z\.unc p3,p2=39
+ b1c:	f8 04 0c 58       	            tf\.nz\.and p2,p3=39
+ b20:	00 00 00 00 01 00 	\[MII\]       nop\.m 0x0
+ b26:	20 7c 02 86 28 40 	            tf\.nz\.or p2,p3=39
+ b2c:	f8 04 0c 59       	            tf\.nz\.or\.andcm p2,p3=39
+ b30:	00 00 00 00 01 00 	\[MII\]       nop\.m 0x0
+ b36:	30 78 02 84 28 60 	            tf\.z\.or p3,p2=39
+ b3c:	f0 04 08 58       	            tf\.z\.and p3,p2=39
+ b40:	00 00 00 00 01 00 	\[MII\]       nop\.m 0x0
+ b46:	30 78 02 84 ac 43 	            tf\.z\.or\.andcm p3,p2=39
+ b4c:	f0 04 0c 50       	      \(p07\) tf\.z p2,p3=39
+ b50:	00 00 00 00 01 c0 	\[MII\]       nop\.m 0x0
+ b56:	21 7c 02 06 a8 43 	      \(p07\) tf\.z\.unc p2,p3=39
+ b5c:	f0 04 0c 58       	      \(p07\) tf\.z\.and p2,p3=39
+ b60:	00 00 00 00 01 c0 	\[MII\]       nop\.m 0x0
+ b66:	21 78 02 86 a8 43 	      \(p07\) tf\.z\.or p2,p3=39
+ b6c:	f0 04 0c 59       	      \(p07\) tf\.z\.or\.andcm p2,p3=39
+ b70:	00 00 00 00 01 c0 	\[MII\]       nop\.m 0x0
+ b76:	31 7c 02 84 a8 63 	      \(p07\) tf\.nz\.or p3,p2=39
+ b7c:	f8 04 08 58       	      \(p07\) tf\.nz\.and p3,p2=39
+ b80:	00 00 00 00 01 c0 	\[MII\]       nop\.m 0x0
+ b86:	31 7c 02 84 ac 63 	      \(p07\) tf\.nz\.or\.andcm p3,p2=39
+ b8c:	f0 04 08 50       	      \(p07\) tf\.z p3,p2=39
+ b90:	00 00 00 00 01 c0 	\[MII\]       nop\.m 0x0
+ b96:	31 7c 02 04 a8 43 	      \(p07\) tf\.z\.unc p3,p2=39
+ b9c:	f8 04 0c 58       	      \(p07\) tf\.nz\.and p2,p3=39
+ ba0:	00 00 00 00 01 c0 	\[MII\]       nop\.m 0x0
+ ba6:	21 7c 02 86 a8 43 	      \(p07\) tf\.nz\.or p2,p3=39
+ bac:	f8 04 0c 59       	      \(p07\) tf\.nz\.or\.andcm p2,p3=39
+ bb0:	00 00 00 00 01 c0 	\[MII\]       nop\.m 0x0
+ bb6:	31 78 02 84 a8 63 	      \(p07\) tf\.z\.or p3,p2=39
+ bbc:	f0 04 08 58       	      \(p07\) tf\.z\.and p3,p2=39
+ bc0:	0d 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
+ bc6:	00 00 00 02 80 63 	            nop\.f 0x0
+ bcc:	f0 04 08 59       	      \(p07\) tf\.z\.or\.andcm p3,p2=39;;
diff --git a/gas/testsuite/gas/ia64/opc-i.s b/gas/testsuite/gas/ia64/opc-i.s
index 09b820e..77ca964 100644
--- a/gas/testsuite/gas/ia64/opc-i.s
+++ b/gas/testsuite/gas/ia64/opc-i.s
@@ -220,3 +220,39 @@ _start:
  (p7)	hint.i 0
  (p7)	hint.i @pause
  (p7)	hint.i 0x1fffff
+
+	# instructions added by SDM2.2:
+
+	tf.z p2, p3 = 39
+	tf.z.unc p2, p3 = 39
+	tf.z.and p2, p3 = 39
+	tf.z.or p2, p3 = 39
+	tf.z.or.andcm p2, p3 = 39
+	tf.z.orcm p2, p3 = 39
+	tf.z.andcm p2, p3 = 39
+	tf.z.and.orcm p2, p3 = 39
+	tf.nz p2, p3 = 39
+	tf.nz.unc p2, p3 = 39
+	tf.nz.and p2, p3 = 39
+	tf.nz.or p2, p3 = 39
+	tf.nz.or.andcm p2, p3 = 39
+	tf.nz.orcm p2, p3 = 39
+	tf.nz.andcm p2, p3 = 39
+	tf.nz.and.orcm p2, p3 = 39
+
+(p7)	tf.z p2, p3 = 39
+(p7)	tf.z.unc p2, p3 = 39
+(p7)	tf.z.and p2, p3 = 39
+(p7)	tf.z.or p2, p3 = 39
+(p7)	tf.z.or.andcm p2, p3 = 39
+(p7)	tf.z.orcm p2, p3 = 39
+(p7)	tf.z.andcm p2, p3 = 39
+(p7)	tf.z.and.orcm p2, p3 = 39
+(p7)	tf.nz p2, p3 = 39
+(p7)	tf.nz.unc p2, p3 = 39
+(p7)	tf.nz.and p2, p3 = 39
+(p7)	tf.nz.or p2, p3 = 39
+(p7)	tf.nz.or.andcm p2, p3 = 39
+(p7)	tf.nz.orcm p2, p3 = 39
+(p7)	tf.nz.andcm p2, p3 = 39
+(p7)	tf.nz.and.orcm p2, p3 = 39
diff --git a/gas/testsuite/gas/ia64/pseudo.d b/gas/testsuite/gas/ia64/pseudo.d
index d181595..3dd8505 100644
--- a/gas/testsuite/gas/ia64/pseudo.d
+++ b/gas/testsuite/gas/ia64/pseudo.d
@@ -25,3 +25,5 @@ Disassembly of section \.text:
 [[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+st16 \[r0\]=r0,ar\.csd
 [[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tbit\.z p0,p12=r0,0
 [[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tnat\.z p0,p13=r0(;;)?
+#...
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tf\.z p3,p2=33(;;)?
diff --git a/gas/testsuite/gas/ia64/pseudo.s b/gas/testsuite/gas/ia64/pseudo.s
index 5c7f66f..06326c1 100644
--- a/gas/testsuite/gas/ia64/pseudo.s
+++ b/gas/testsuite/gas/ia64/pseudo.s
@@ -13,3 +13,7 @@ _start:
 	st16		[r0] = r0
 	tbit.nz		p12 = r0, 0
 	tnat.nz		p13 = r0
+
+	# instructions added by SDM2.2:
+
+	tf.nz p2, p3 = 33