aarch64: [SME] Add SME mode selection and state access instructions

This patch is adding new SME mode selection and state access instructions:
* Add SMSTART and SMSTOP instructions.
* Add SVCR system register.

gas/ChangeLog:

	* config/tc-aarch64.c (parse_sme_sm_za): New parser.
	(parse_operands): New parser.
	* testsuite/gas/aarch64/sme-8-illegal.d: New test.
	* testsuite/gas/aarch64/sme-8-illegal.l: New test.
	* testsuite/gas/aarch64/sme-8-illegal.s: New test.
	* testsuite/gas/aarch64/sme-8.d: New test.
	* testsuite/gas/aarch64/sme-8.s: New test.

include/ChangeLog:

	* opcode/aarch64.h (enum aarch64_opnd): New operand
	AARCH64_OPND_SME_SM_ZA.
	(enum aarch64_insn_class): New instruction classes
	sme_start and sme_stop.

opcodes/ChangeLog:

	* aarch64-asm.c (aarch64_ins_pstatefield): New inserter.
	(aarch64_ins_sme_sm_za): New inserter.
	* aarch64-dis.c (aarch64_ext_imm): New extractor.
	(aarch64_ext_pstatefield): New extractor.
	(aarch64_ext_sme_sm_za): New extractor.
	* aarch64-opc.c (operand_general_constraint_met_p):
	New pstatefield value for SME instructions.
	(aarch64_print_operand): Printout for OPND_SME_SM_ZA.
	(SR_SME): New register SVCR.
	* aarch64-opc.h (F_REG_IN_CRM): New register endcoding.
	* aarch64-opc.h (F_IMM_IN_CRM): New immediate endcoding.
	(PSTATE_ENCODE_CRM): Encode CRm field.
	(PSTATE_DECODE_CRM): Decode CRm field.
	(PSTATE_ENCODE_CRM_IMM): Encode CRm immediate field.
	(PSTATE_DECODE_CRM_IMM): Decode CRm immediate field.
	(PSTATE_ENCODE_CRM_AND_IMM): Encode CRm and immediate
	field.
	* aarch64-tbl.h (struct aarch64_opcode): New SMSTART
	and SMSTOP instructions.
	aarch64-asm-2.c: Regenerate.
	aarch64-dis-2.c: Regenerate.
	aarch64-opc-2.c: Regenerate.

6 files changed, 122 insertions, 8 deletions

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index d45b903..24cfabf 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -4629,6 +4629,32 @@ parse_sme_za_array (char **str, int *imm)
   return regno;
 }
 
+/* Parse streaming mode operand for SMSTART and SMSTOP.
+
+   {SM | ZA}
+
+   Function returns 's' if SM or 'z' if ZM is parsed. Otherwise PARSE_FAIL.
+*/
+static int
+parse_sme_sm_za (char **str)
+{
+  char *p, *q;
+
+  p = q = *str;
+  while (ISALPHA (*q))
+    q++;
+
+  if ((q - p != 2)
+      || (strncasecmp ("sm", p, 2) != 0 && strncasecmp ("za", p, 2) != 0))
+    {
+      set_syntax_error (_("expected SM or ZA operand"));
+      return PARSE_FAIL;
+    }
+
+  *str = q;
+  return TOLOWER (p[0]);
+}
+
 /* Parse a system register or a PSTATE field name for an MSR/MRS instruction.
    Returns the encoding for the option, or PARSE_FAIL.
 
@@ -7032,6 +7058,16 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	  /* No qualifier.  */
 	  break;
 
+	case AARCH64_OPND_SME_SM_ZA:
+	  /* { SM | ZA }  */
+	  if ((val = parse_sme_sm_za (&str)) == PARSE_FAIL)
+	    {
+	      set_syntax_error (_("unknown or missing PSTATE field name"));
+	      goto failure;
+	    }
+	  info->reg.regno = val;
+	  break;
+
 	case AARCH64_OPND_SVE_ADDR_RI_S4x16:
 	case AARCH64_OPND_SVE_ADDR_RI_S4x32:
 	case AARCH64_OPND_SVE_ADDR_RI_S4xVL:
@@ -7221,14 +7257,18 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	  }
 
 	case AARCH64_OPND_PSTATEFIELD:
-	  if ((val = parse_sys_reg (&str, aarch64_pstatefield_hsh, 0, 1, NULL))
-	      == PARSE_FAIL)
-	    {
-	      set_syntax_error (_("unknown or missing PSTATE field name"));
-	      goto failure;
-	    }
-	  inst.base.operands[i].pstatefield = val;
-	  break;
+	  {
+	    uint32_t sysreg_flags;
+	    if ((val = parse_sys_reg (&str, aarch64_pstatefield_hsh, 0, 1,
+				      &sysreg_flags)) == PARSE_FAIL)
+	      {
+	        set_syntax_error (_("unknown or missing PSTATE field name"));
+	        goto failure;
+	      }
+	    inst.base.operands[i].pstatefield = val;
+	    inst.base.operands[i].sysreg.flags = sysreg_flags;
+	    break;
+	  }
 
 	case AARCH64_OPND_SYSREG_IC:
 	  inst.base.operands[i].sysins_op =
diff --git a/gas/testsuite/gas/aarch64/sme-8-illegal.d b/gas/testsuite/gas/aarch64/sme-8-illegal.d
new file mode 100644
index 0000000..1b3c3bc
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-8-illegal.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme-8-illegal.s
+#error_output: sme-8-illegal.l
diff --git a/gas/testsuite/gas/aarch64/sme-8-illegal.l b/gas/testsuite/gas/aarch64/sme-8-illegal.l
new file mode 100644
index 0000000..ee9f76f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-8-illegal.l
@@ -0,0 +1,7 @@
+[^:]*: Assembler messages:
+[^:]*:[0-9]+: Error: unexpected characters following instruction -- `smstart x0'
+[^:]*:[0-9]+: Error: unexpected characters following instruction -- `smstart sa'
+[^:]*:[0-9]+: Error: unexpected characters following instruction -- `smstart zm'
+[^:]*:[0-9]+: Error: unexpected characters following instruction -- `smstop x0'
+[^:]*:[0-9]+: Error: unexpected characters following instruction -- `smstop sa'
+[^:]*:[0-9]+: Error: unexpected characters following instruction -- `smstop zm'
diff --git a/gas/testsuite/gas/aarch64/sme-8-illegal.s b/gas/testsuite/gas/aarch64/sme-8-illegal.s
new file mode 100644
index 0000000..a0e2022
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-8-illegal.s
@@ -0,0 +1,9 @@
+/* Scalable Matrix Extension (SME).  */
+
+smstart x0
+smstart sa
+smstart zm
+
+smstop x0
+smstop sa
+smstop zm
diff --git a/gas/testsuite/gas/aarch64/sme-8.d b/gas/testsuite/gas/aarch64/sme-8.d
new file mode 100644
index 0000000..c956baa
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-8.d
@@ -0,0 +1,27 @@
+#name: SME mode selection and state access instructions
+#as: -march=armv8-a+sme
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+   0:	d53b4240 	mrs	x0, svcr
+   4:	d51b4240 	msr	svcr, x0
+   8:	d503427f 	smstop	sm
+   c:	d503447f 	smstop	za
+  10:	d503467f 	smstop
+  14:	d503437f 	smstart	sm
+  18:	d503457f 	smstart	za
+  1c:	d503477f 	smstart
+  20:	d503477f 	smstart
+  24:	d503437f 	smstart	sm
+  28:	d503457f 	smstart	za
+  2c:	d503437f 	smstart	sm
+  30:	d503457f 	smstart	za
+  34:	d503467f 	smstop
+  38:	d503427f 	smstop	sm
+  3c:	d503447f 	smstop	za
+  40:	d503427f 	smstop	sm
+  44:	d503447f 	smstop	za
diff --git a/gas/testsuite/gas/aarch64/sme-8.s b/gas/testsuite/gas/aarch64/sme-8.s
new file mode 100644
index 0000000..d4a0753
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-8.s
@@ -0,0 +1,28 @@
+/* SME mode selection and state access instructions.  */
+
+/* SVCR system register access.  */
+mrs x0, svcr
+msr svcr, x0
+
+/* MSR SVCR Immediate access.  */
+msr svcrsm, #0
+msr svcrza, #0
+msr svcrsmza, #0
+
+msr svcrsm, #1
+msr svcrza, #1
+msr svcrsmza, #1
+
+/* SMSTART.  */
+smstart
+smstart sm
+smstart za
+smstart SM
+smstart ZA
+
+/* SMSTOP.  */
+smstop
+smstop sm
+smstop za
+smstop SM
+smstop ZA