Add support for AArch32 CRC instruction in ARMv8.

gas/ChangeLog
2013-03-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/tc-arm.c (crc_ext_armv8): New feature set.
	(UNPRED_REG): New macro.
	(do_crc32_1): New function.
	(do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
	do_crc32ch, do_crc32cw): Likewise.
	(TUEc): New macro.
	(insns): Add entries for crc32 mnemonics.
	(arm_extensions): Add entry for crc.

include/opcode/ChangeLog
2013-03-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* arm.h (CRC_EXT_ARMV8): New constant.
	(ARCH_CRC_ARMV8): New macro.

opcodes/ChangeLog
2013-03-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* arm-dis.c (arm_opcodes): Add entries for CRC instructions.
	(thumb32_opcodes): Likewise.
	(print_insn_thumb32): Handle 'S' control char.

gas/testsuite/ChangeLog
2013-03-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* gas/arm/crc32-bad.d: New file.
	* gas/arm/crc32-bad.l: Likewise.
	* gas/arm/crc32-bad.s: Likewise.
	* gas/arm/crc32.d: Likewise.
	* gas/arm/crc32.s: Likewise.

6 files changed, 97 insertions, 0 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d89f44f..7b2cdab 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2013-03-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* gas/arm/crc32-bad.d: New file.
+	* gas/arm/crc32-bad.l: Likewise.
+	* gas/arm/crc32-bad.s: Likewise.
+	* gas/arm/crc32.d: Likewise.
+	* gas/arm/crc32.s: Likewise.
+
 2013-03-05  Yufeng Zhang  <yufeng.zhang@arm.com>
 
 	* gas/aarch64/diagnostic.s: Add test.
diff --git a/gas/testsuite/gas/arm/crc32-bad.d b/gas/testsuite/gas/arm/crc32-bad.d
new file mode 100644
index 0000000..34e0b6c
--- /dev/null
+++ b/gas/testsuite/gas/arm/crc32-bad.d
@@ -0,0 +1,21 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: Unpredictable ARMv8 CRC32 instructions.
+#as: -march=armv8-a+crc
+#stderr: crc32-bad.l
+
+.*: +file format .*arm.*
+
+
+Disassembly of section .text:
+0+0 <[^>]*> e101f042 	crc32b	pc, r1, r2	; <UNPREDICTABLE>
+0+4 <[^>]*> e12f0042 	crc32h	r0, pc, r2	; <UNPREDICTABLE>
+0+8 <[^>]*> e141004f 	crc32w	r0, r1, pc	; <UNPREDICTABLE>
+0+c <[^>]*> e10f0242 	crc32cb	r0, pc, r2	; <UNPREDICTABLE>
+0+10 <[^>]*> e121f242 	crc32ch	pc, r1, r2	; <UNPREDICTABLE>
+0+14 <[^>]*> e14f0242 	crc32cw	r0, pc, r2	; <UNPREDICTABLE>
+0+18 <[^>]*> fac1 fd82 	crc32b	sp, r1, r2	; <UNPREDICTABLE>
+0+1c <[^>]*> facf f092 	crc32h	r0, pc, r2	; <UNPREDICTABLE>
+0+20 <[^>]*> fac1 f0ad 	crc32w	r0, r1, sp	; <UNPREDICTABLE>
+0+24 <[^>]*> fadf f082 	crc32cb	r0, pc, r2	; <UNPREDICTABLE>
+0+28 <[^>]*> fad1 fd92 	crc32ch	sp, r1, r2	; <UNPREDICTABLE>
+0+2c <[^>]*> fadf f0a2 	crc32cw	r0, pc, r2	; <UNPREDICTABLE>
diff --git a/gas/testsuite/gas/arm/crc32-bad.l b/gas/testsuite/gas/arm/crc32-bad.l
new file mode 100644
index 0000000..ea520aa
--- /dev/null
+++ b/gas/testsuite/gas/arm/crc32-bad.l
@@ -0,0 +1,13 @@
+[^:]*: Assembler messages:
+[^:]*:4: Warning: using r15 results in unpredictable behaviour
+[^:]*.s:5: Warning: using r15 results in unpredictable behaviour
+[^:]*.s:6: Warning: using r15 results in unpredictable behaviour
+[^:]*.s:7: Warning: using r15 results in unpredictable behaviour
+[^:]*.s:8: Warning: using r15 results in unpredictable behaviour
+[^:]*.s:9: Warning: using r15 results in unpredictable behaviour
+[^:]*.s:12: Warning: using r13 results in unpredictable behaviour
+[^:]*.s:13: Warning: using r15 results in unpredictable behaviour
+[^:]*.s:14: Warning: using r13 results in unpredictable behaviour
+[^:]*.s:15: Warning: using r15 results in unpredictable behaviour
+[^:]*.s:16: Warning: using r13 results in unpredictable behaviour
+[^:]*.s:17: Warning: using r15 results in unpredictable behaviour
diff --git a/gas/testsuite/gas/arm/crc32-bad.s b/gas/testsuite/gas/arm/crc32-bad.s
new file mode 100644
index 0000000..4e497e3
--- /dev/null
+++ b/gas/testsuite/gas/arm/crc32-bad.s
@@ -0,0 +1,17 @@
+.section .text
+.syntax unified
+.arm
+crc32b r15, r1, r2
+crc32h r0, r15, r2
+crc32w r0, r1, r15
+crc32cb r0, r15, r2
+crc32ch r15, r1, r2
+crc32cw r0, r15, r2
+
+.thumb
+crc32b r13, r1, r2
+crc32h r0, r15, r2
+crc32w r0, r1, r13
+crc32cb r0, r15, r2
+crc32ch r13, r1, r2
+crc32cw r0, r15, r2
diff --git a/gas/testsuite/gas/arm/crc32.d b/gas/testsuite/gas/arm/crc32.d
new file mode 100644
index 0000000..e511f5e
--- /dev/null
+++ b/gas/testsuite/gas/arm/crc32.d
@@ -0,0 +1,21 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: ARMv8 CRC32 instructions
+#as: -march=armv8-a+crc
+
+.*: *file format .*arm.*
+
+
+Disassembly of section .text:
+0+0 <[^>]*> e1010042 	crc32b	r0, r1, r2
+0+4 <[^>]*> e1210042 	crc32h	r0, r1, r2
+0+8 <[^>]*> e1410042 	crc32w	r0, r1, r2
+0+c <[^>]*> e1010242 	crc32cb	r0, r1, r2
+0+10 <[^>]*> e1210242 	crc32ch	r0, r1, r2
+0+14 <[^>]*> e1410242 	crc32cw	r0, r1, r2
+0+18 <[^>]*> fac1 f082 	crc32b	r0, r1, r2
+0+1c <[^>]*> fac1 f092 	crc32h	r0, r1, r2
+0+20 <[^>]*> fac1 f0a2 	crc32w	r0, r1, r2
+0+24 <[^>]*> fad1 f082 	crc32cb	r0, r1, r2
+0+28 <[^>]*> fad1 f092 	crc32ch	r0, r1, r2
+0+2c <[^>]*> fad1 f0a2 	crc32cw	r0, r1, r2
+
diff --git a/gas/testsuite/gas/arm/crc32.s b/gas/testsuite/gas/arm/crc32.s
new file mode 100644
index 0000000..63c1d68
--- /dev/null
+++ b/gas/testsuite/gas/arm/crc32.s
@@ -0,0 +1,17 @@
+.section .text
+.syntax unified
+.arm
+crc32b r0, r1, r2
+crc32h r0, r1, r2
+crc32w r0, r1, r2
+crc32cb r0, r1, r2
+crc32ch r0, r1, r2
+crc32cw r0, r1, r2
+
+.thumb
+crc32b r0, r1, r2
+crc32h r0, r1, r2
+crc32w r0, r1, r2
+crc32cb r0, r1, r2
+crc32ch r0, r1, r2
+crc32cw r0, r1, r2