Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.

gas/ChangeLog
	* gas/config/tc-i386.c: Not handle lret/iret.
	* gas/testsuite/gas/i386/lfence-ret-a.d: Adjust testcase.
	* gas/testsuite/gas/i386/lfence-ret-b.d: Ditto.
	* gas/testsuite/gas/i386/lfence-ret-c.d: Ditto.
	* gas/testsuite/gas/i386/lfence-ret-d.d: Ditto.
	* gas/testsuite/gas/i386/lfence-ret.s: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-a.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-b.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-c.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-d.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-e.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret.s: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret.e: Deleted.

12 files changed, 1 insertions, 167 deletions

diff --git a/gas/testsuite/gas/i386/lfence-ret-a.d b/gas/testsuite/gas/i386/lfence-ret-a.d
index aa35857..613d1d5 100644
--- a/gas/testsuite/gas/i386/lfence-ret-a.d
+++ b/gas/testsuite/gas/i386/lfence-ret-a.d
@@ -21,16 +21,4 @@ Disassembly of section .text:
  +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%esp\)
  +[a-f0-9]+:	0f ae e8             	lfence 
  +[a-f0-9]+:	c2 1e 00             	ret    \$0x1e
- +[a-f0-9]+:	66 83 0c 24 00       	orw    \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 cb                	lretw  
- +[a-f0-9]+:	66 83 0c 24 00       	orw    \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 ca 28 00          	lretw  \$0x28
- +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	cb                   	lret   
- +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	ca 28 00             	lret   \$0x28
 #pass
diff --git a/gas/testsuite/gas/i386/lfence-ret-b.d b/gas/testsuite/gas/i386/lfence-ret-b.d
index 77001c4..e6dd4f4 100644
--- a/gas/testsuite/gas/i386/lfence-ret-b.d
+++ b/gas/testsuite/gas/i386/lfence-ret-b.d
@@ -25,20 +25,4 @@ Disassembly of section .text:
  +[a-f0-9]+:	f7 14 24             	notl   \(%esp\)
  +[a-f0-9]+:	0f ae e8             	lfence 
  +[a-f0-9]+:	c2 1e 00             	ret    \$0x1e
- +[a-f0-9]+:	66 f7 14 24          	notw   \(%esp\)
- +[a-f0-9]+:	66 f7 14 24          	notw   \(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 cb                	lretw  
- +[a-f0-9]+:	66 f7 14 24          	notw   \(%esp\)
- +[a-f0-9]+:	66 f7 14 24          	notw   \(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 ca 28 00          	lretw  \$0x28
- +[a-f0-9]+:	f7 14 24             	notl   \(%esp\)
- +[a-f0-9]+:	f7 14 24             	notl   \(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	cb                   	lret   
- +[a-f0-9]+:	f7 14 24             	notl   \(%esp\)
- +[a-f0-9]+:	f7 14 24             	notl   \(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	ca 28 00             	lret   \$0x28
 #pass
diff --git a/gas/testsuite/gas/i386/lfence-ret-c.d b/gas/testsuite/gas/i386/lfence-ret-c.d
index fceb0eb..02f57fe 100644
--- a/gas/testsuite/gas/i386/lfence-ret-c.d
+++ b/gas/testsuite/gas/i386/lfence-ret-c.d
@@ -1,7 +1,7 @@
 #source: lfence-ret.s
 #as: -mlfence-before-ret=or -mlfence-before-indirect-branch=all
 #objdump: -dw
-
+#name -mlfence-before-ret=or -mlfence-before-indirect-branch=all
 .*: +file format .*
 
 
@@ -20,16 +20,4 @@ Disassembly of section .text:
  +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%esp\)
  +[a-f0-9]+:	0f ae e8             	lfence 
  +[a-f0-9]+:	c2 1e 00             	ret    \$0x1e
- +[a-f0-9]+:	66 83 0c 24 00       	orw    \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 cb                	lretw  
- +[a-f0-9]+:	66 83 0c 24 00       	orw    \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 ca 28 00          	lretw  \$0x28
- +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	cb                   	lret   
- +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	ca 28 00             	lret   \$0x28
 #pass
diff --git a/gas/testsuite/gas/i386/lfence-ret-d.d b/gas/testsuite/gas/i386/lfence-ret-d.d
index 03f8f88..9078216 100644
--- a/gas/testsuite/gas/i386/lfence-ret-d.d
+++ b/gas/testsuite/gas/i386/lfence-ret-d.d
@@ -21,16 +21,4 @@ Disassembly of section .text:
  +[a-f0-9]+:	c1 24 24 00          	shll   \$0x0,\(%esp\)
  +[a-f0-9]+:	0f ae e8             	lfence 
  +[a-f0-9]+:	c2 1e 00             	ret    \$0x1e
- +[a-f0-9]+:	66 c1 24 24 00       	shlw   \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 cb                	lretw  
- +[a-f0-9]+:	66 c1 24 24 00       	shlw   \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 ca 28 00          	lretw  \$0x28
- +[a-f0-9]+:	c1 24 24 00          	shll   \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	cb                   	lret   
- +[a-f0-9]+:	c1 24 24 00          	shll   \$0x0,\(%esp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	ca 28 00             	lret   \$0x28
 #pass
diff --git a/gas/testsuite/gas/i386/lfence-ret.s b/gas/testsuite/gas/i386/lfence-ret.s
index f27fa58..5de4f08 100644
--- a/gas/testsuite/gas/i386/lfence-ret.s
+++ b/gas/testsuite/gas/i386/lfence-ret.s
@@ -4,7 +4,3 @@ _start:
 	retw	$20
 	ret
 	ret	$30
-	lretw
-	lretw	$40
-	lret
-	lret	$40	
diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
index 345217b..9688167 100644
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=or
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=or
 
@@ -28,22 +27,4 @@ Disassembly of section .text:
  +[a-f0-9]+:	48 83 0c 24 00       	orq    \$0x0,\(%rsp\)
  +[a-f0-9]+:	0f ae e8             	lfence 
  +[a-f0-9]+:	66 48 c2 28 00       	data16 rex.W retq \$0x28
- +[a-f0-9]+:	66 83 0c 24 00       	orw    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 cb                	lretw  
- +[a-f0-9]+:	66 83 0c 24 00       	orw    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 ca 28 00          	lretw  \$0x28
- +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	cb                   	lret   
- +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	ca 28 00             	lret   \$0x28
- +[a-f0-9]+:	48 83 0c 24 00       	orq    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 cb                	lretq  
- +[a-f0-9]+:	48 83 0c 24 00       	orq    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 ca 28 00          	lretq  \$0x28
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
index 3947660..4afad79 100644
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=not
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=not
 
@@ -34,28 +33,4 @@ Disassembly of section .text:
  +[a-f0-9]+:	48 f7 14 24          	notq   \(%rsp\)
  +[a-f0-9]+:	0f ae e8             	lfence 
  +[a-f0-9]+:	66 48 c2 28 00       	data16 rex.W retq \$0x28
- +[a-f0-9]+:	66 f7 14 24          	notw   \(%rsp\)
- +[a-f0-9]+:	66 f7 14 24          	notw   \(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 cb                	lretw  
- +[a-f0-9]+:	66 f7 14 24          	notw   \(%rsp\)
- +[a-f0-9]+:	66 f7 14 24          	notw   \(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 ca 28 00          	lretw  \$0x28
- +[a-f0-9]+:	f7 14 24             	notl   \(%rsp\)
- +[a-f0-9]+:	f7 14 24             	notl   \(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	cb                   	lret   
- +[a-f0-9]+:	f7 14 24             	notl   \(%rsp\)
- +[a-f0-9]+:	f7 14 24             	notl   \(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	ca 28 00             	lret   \$0x28
- +[a-f0-9]+:	48 f7 14 24          	notq   \(%rsp\)
- +[a-f0-9]+:	48 f7 14 24          	notq   \(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 cb                	lretq  
- +[a-f0-9]+:	48 f7 14 24          	notq   \(%rsp\)
- +[a-f0-9]+:	48 f7 14 24          	notq   \(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 ca 28 00          	lretq  \$0x28
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d
index cd89a95..55b0ecb 100644
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=or -mlfence-before-indirect-branch=all
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 
 .*: +file format .*
@@ -27,22 +26,4 @@ Disassembly of section .text:
  +[a-f0-9]+:	48 83 0c 24 00       	orq    \$0x0,\(%rsp\)
  +[a-f0-9]+:	0f ae e8             	lfence 
  +[a-f0-9]+:	66 48 c2 28 00       	data16 rex.W retq \$0x28
- +[a-f0-9]+:	66 83 0c 24 00       	orw    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 cb                	lretw  
- +[a-f0-9]+:	66 83 0c 24 00       	orw    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 ca 28 00          	lretw  \$0x28
- +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	cb                   	lret   
- +[a-f0-9]+:	83 0c 24 00          	orl    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	ca 28 00             	lret   \$0x28
- +[a-f0-9]+:	48 83 0c 24 00       	orq    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 cb                	lretq  
- +[a-f0-9]+:	48 83 0c 24 00       	orq    \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 ca 28 00          	lretq  \$0x28
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
index 593b889..efe928a 100644
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=shl
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=shl
 
@@ -28,22 +27,4 @@ Disassembly of section .text:
  +[a-f0-9]+:	48 c1 24 24 00       	shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+:	0f ae e8             	lfence 
  +[a-f0-9]+:	66 48 c2 28 00       	data16 rex.W retq \$0x28
- +[a-f0-9]+:	66 c1 24 24 00       	shlw   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 cb                	lretw  
- +[a-f0-9]+:	66 c1 24 24 00       	shlw   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 ca 28 00          	lretw  \$0x28
- +[a-f0-9]+:	c1 24 24 00          	shll   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	cb                   	lret   
- +[a-f0-9]+:	c1 24 24 00          	shll   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	ca 28 00             	lret   \$0x28
- +[a-f0-9]+:	48 c1 24 24 00       	shlq   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 cb                	lretq  
- +[a-f0-9]+:	48 c1 24 24 00       	shlq   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 ca 28 00          	lretq  \$0x28
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d
index b4d2296..3128666 100644
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=shl
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=yes
 
@@ -28,22 +27,4 @@ Disassembly of section .text:
  +[a-f0-9]+:	48 c1 24 24 00       	shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+:	0f ae e8             	lfence 
  +[a-f0-9]+:	66 48 c2 28 00       	data16 rex.W retq \$0x28
- +[a-f0-9]+:	66 c1 24 24 00       	shlw   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 cb                	lretw  
- +[a-f0-9]+:	66 c1 24 24 00       	shlw   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	66 ca 28 00          	lretw  \$0x28
- +[a-f0-9]+:	c1 24 24 00          	shll   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	cb                   	lret   
- +[a-f0-9]+:	c1 24 24 00          	shll   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	ca 28 00             	lret   \$0x28
- +[a-f0-9]+:	48 c1 24 24 00       	shlq   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 cb                	lretq  
- +[a-f0-9]+:	48 c1 24 24 00       	shlq   \$0x0,\(%rsp\)
- +[a-f0-9]+:	0f ae e8             	lfence 
- +[a-f0-9]+:	48 ca 28 00          	lretq  \$0x28
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret.e b/gas/testsuite/gas/i386/x86-64-lfence-ret.e
deleted file mode 100644
index 13730e5..0000000
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret.e
+++ /dev/null
@@ -1,3 +0,0 @@
-.*: Assembler messages:
-.*:??: Warning: no instruction mnemonic suffix given and no register operands; using default for `lret'
-.*:??: Warning: no instruction mnemonic suffix given and no register operands; using default for `lret'
diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret.s b/gas/testsuite/gas/i386/x86-64-lfence-ret.s
index 986239c..dd0961a 100644
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret.s
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret.s
@@ -6,9 +6,3 @@ _start:
 	ret	$30
 	data16 rex.w ret
 	data16 rex.w ret	$40
-	lretw
-	lretw	$40
-	lret
-	lret	$40
-	lretq
-	lretq	$40