diff options
author | Jan Beulich <jbeulich@suse.com> | 2024-05-17 10:52:36 +0200 |
---|---|---|
committer | Jan Beulich <jbeulich@suse.com> | 2024-05-17 10:52:36 +0200 |
commit | 132a0b0d77fe11db4b03182d3317ae204491a6a9 (patch) | |
tree | fbcdbf988e33305828533beed02fedf8cc38c385 /gas/testsuite | |
parent | de203ed568f670387d2870c13dc4cae9e30f3f8b (diff) | |
download | binutils-132a0b0d77fe11db4b03182d3317ae204491a6a9.zip binutils-132a0b0d77fe11db4b03182d3317ae204491a6a9.tar.gz binutils-132a0b0d77fe11db4b03182d3317ae204491a6a9.tar.bz2 |
aarch64: correct SVE2.1 ld{3,4}q / st{3,4}q (scalar plus immediate)
Like their byte, half, word, and doubleword counterparts their
immediates are multiples of 3 / 4 respectively.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-1-bad.l | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-1.d | 10 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-1.s | 8 |
3 files changed, 13 insertions, 13 deletions
diff --git a/gas/testsuite/gas/aarch64/sve2p1-1-bad.l b/gas/testsuite/gas/aarch64/sve2p1-1-bad.l index 50a4bac..58f5b18 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-1-bad.l +++ b/gas/testsuite/gas/aarch64/sve2p1-1-bad.l @@ -82,15 +82,15 @@ .*: Error: selected processor does not support `fminqv v16.4s,p7,z0.s' .*: Error: selected processor does not support `ld1q Z0.Q,p4/Z,\[Z16.D,x0\]' .*: Error: selected processor does not support `ld2q {Z0.Q,Z1.Q},p4/Z,\[x0,#-4,MUL VL\]' -.*: Error: selected processor does not support `ld3q {Z0.Q,Z1.Q,Z2.Q},p4/Z,\[x0,#-4,MUL VL\]' -.*: Error: selected processor does not support `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p4/Z,\[x0,#-4,MUL VL\]' +.*: Error: selected processor does not support `ld3q .* +.*: Error: selected processor does not support `ld4q .* .*: Error: selected processor does not support `ld2q {Z0.Q,Z1.Q},p4/Z,\[x0,x2,lsl#4\]' .*: Error: selected processor does not support `ld3q {Z0.Q,Z1.Q,Z2.Q},p4/Z,\[x0,x4,lsl#4\]' .*: Error: selected processor does not support `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p4/Z,\[x0,x6,lsl#4\]' .*: Error: selected processor does not support `st1q Z0.Q,p4,\[Z16.D,x0\]' .*: Error: selected processor does not support `st2q {Z0.Q,Z1.Q},p4,\[x0,#-4,MUL VL\]' -.*: Error: selected processor does not support `st3q {Z0.Q,Z1.Q,Z2.Q},p4,\[x0,#-4,MUL VL\]' -.*: Error: selected processor does not support `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p4,\[x0,#-4,MUL VL\]' +.*: Error: selected processor does not support `st3q .* +.*: Error: selected processor does not support `st4q .* .*: Error: selected processor does not support `st2q {Z0.Q,Z1.Q},p4,\[x0,x2,lsl#4\]' .*: Error: selected processor does not support `st3q {Z0.Q,Z1.Q,Z2.Q},p4,\[x0,x4,lsl#4\]' .*: Error: selected processor does not support `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p4,\[x0,x6,lsl#4\]' diff --git a/gas/testsuite/gas/aarch64/sve2p1-1.d b/gas/testsuite/gas/aarch64/sve2p1-1.d index daece89..6f46433 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-1.d +++ b/gas/testsuite/gas/aarch64/sve2p1-1.d @@ -1,4 +1,4 @@ -#name: Test of SVE2.1 min max instructions. +#name: Test of SVE2.1 instructions #as: -march=armv9.4-a+sve2p1 #objdump: -dr @@ -91,15 +91,15 @@ .*: 6497bc10 fminqv v16.4s, p7, z0.s .*: c400b200 ld1q z0.q, p4/z, \[z16.d, x0\] .*: a49ef000 ld2q {z0.q, z1.q}, p4/z, \[x0, #-4, mul vl\] -.*: a51ef000 ld3q {z0.q, z1.q, z2.q}, p4/z, \[x0, #-4, mul vl\] -.*: a59ef000 ld4q {z0.q, z1.q, z2.q, z3.q}, p4/z, \[x0, #-4, mul vl\] +.*: a51ef000 ld3q {z0.q, z1.q, z2.q}, p4/z, \[x0, #-6, mul vl\] +.*: a59ef000 ld4q {z0.q, z1.q, z2.q, z3.q}, p4/z, \[x0, #-8, mul vl\] .*: a4a2f000 ld2h {z0.h-z1.h}, p4/z, \[x0, #4, mul vl\] .*: a5249000 ld3q {z0.q, z1.q, z2.q}, p4/z, \[x0, x4, lsl #4\] .*: a5a69000 ld4q {z0.q, z1.q, z2.q, z3.q}, p4/z, \[x0, x6, lsl #4\] .*: e4203200 st1q z0.q, p4, \[z16.d, x0\] .*: e44e1000 st2q {z0.q, z1.q}, p4, \[x0, #-4, mul vl\] -.*: e48e1000 st3q {z0.q, z1.q, z2.q}, p4, \[x0, #-4, mul vl\] -.*: e4ce1000 st4q {z0.q, z1.q, z2.q, z3.q}, p4, \[x0, #-4, mul vl\] +.*: e48e1000 st3q {z0.q, z1.q, z2.q}, p4, \[x0, #-6, mul vl\] +.*: e4ce1000 st4q {z0.q, z1.q, z2.q, z3.q}, p4, \[x0, #-8, mul vl\] .*: e4621000 st2q {z0.q, z1.q}, p4, \[x0, x2, lsl #4\] .*: e4a41000 st3q {z0.q, z1.q, z2.q}, p4, \[x0, x4, lsl #4\] .*: e4e61000 st4q {z0.q, z1.q, z2.q, z3.q}, p4, \[x0, x6, lsl #4\] diff --git a/gas/testsuite/gas/aarch64/sve2p1-1.s b/gas/testsuite/gas/aarch64/sve2p1-1.s index 2a1c7c1..753f27f 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-1.s +++ b/gas/testsuite/gas/aarch64/sve2p1-1.s @@ -92,16 +92,16 @@ fminqv v8.2d, p4, z1.d fminqv v16.4s, p7, z0.s ld1q Z0.Q, p4/Z, [Z16.D, x0] ld2q {Z0.Q, Z1.Q}, p4/Z, [x0, #-4, MUL VL] -ld3q {Z0.Q, Z1.Q, Z2.Q}, p4/Z, [x0, #-4, MUL VL] -ld4q {Z0.Q, Z1.Q, Z2.Q, Z3.Q}, p4/Z, [x0, #-4, MUL VL] +ld3q {Z0.Q, Z1.Q, Z2.Q}, p4/Z, [x0, #-6, MUL VL] +ld4q {Z0.Q, Z1.Q, Z2.Q, Z3.Q}, p4/Z, [x0, #-8, MUL VL] ld2q {Z0.Q, Z1.Q}, p4/Z, [x0, x2, lsl #4] ld3q {Z0.Q, Z1.Q, Z2.Q}, p4/Z, [x0, x4, lsl #4] ld4q {Z0.Q, Z1.Q, Z2.Q, Z3.Q}, p4/Z, [x0, x6, lsl #4] st1q Z0.Q, p4, [Z16.D, x0] st2q {Z0.Q, Z1.Q}, p4, [x0, #-4, MUL VL] -st3q {Z0.Q, Z1.Q, Z2.Q}, p4, [x0, #-4, MUL VL] -st4q {Z0.Q, Z1.Q, Z2.Q, Z3.Q}, p4, [x0, #-4, MUL VL] +st3q {Z0.Q, Z1.Q, Z2.Q}, p4, [x0, #-6, MUL VL] +st4q {Z0.Q, Z1.Q, Z2.Q, Z3.Q}, p4, [x0, #-8, MUL VL] st2q {Z0.Q, Z1.Q}, p4, [x0, x2, lsl #4] st3q {Z0.Q, Z1.Q, Z2.Q}, p4, [x0, x4, lsl #4] st4q {Z0.Q, Z1.Q, Z2.Q, Z3.Q}, p4, [x0, x6, lsl #4] |