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| author | H.J. Lu <hjl.tools@gmail.com> | 2007-08-09 13:50:51 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2007-08-09 13:50:51 +0000 |
| commit | c3ad16c0cde34747ea3f1d3fb9c17dd85d9ca475 (patch) | |
| tree | e4b2fdea68189bd7bd08c79dd73a6d975bceb9ac /gas/config | |
| parent | 1e1c6a43f8cc11e8d7d3809074d762c5a0a8d62e (diff) | |
| download | binutils-c3ad16c0cde34747ea3f1d3fb9c17dd85d9ca475.zip binutils-c3ad16c0cde34747ea3f1d3fb9c17dd85d9ca475.tar.gz binutils-c3ad16c0cde34747ea3f1d3fb9c17dd85d9ca475.tar.bz2 | |
gas/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (check_byte_reg): Support pextrb and pinsrb.
gas/testsuite/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse4_1-intel, sse4_2-intel,
x86-64-sse4_1-intel and x86-64-sse4_2-intel.
* gas/i386/sse4_1-intel.d: New file.
* gas/i386/sse4_2-intel.d: Likewise.
* gas/i386/x86-64-sse4_1-intel.d: Likewise.
* gas/i386/x86-64-sse4_2-intel.d: Likewise.
* gas/i386/sse4_1.s: Add tests for Intel syntax.
* gas/i386/sse4_2.s: Likewise.
* gas/i386/x86-64-sse4_1.s: Likewise.
* gas/i386/x86-64-sse4_2.s: Likewise.
* gas/i386/sse4_1.d: Updated.
* gas/i386/sse4_2.d: Likewise.
* gas/i386/x86-64-sse4_1.d: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
opcodes/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
* i386-tbl.h: Regenerated.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 8b5a97d..13e7d7a 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -3062,13 +3062,16 @@ check_byte_reg (void) if (i.types[op] & Reg8) continue; - /* movzx and movsx should not generate this warning. */ + /* movzx, movsx, pextrb and pinsrb should not generate this + warning. */ if (intel_syntax && (i.tm.base_opcode == 0xfb7 || i.tm.base_opcode == 0xfb6 || i.tm.base_opcode == 0x63 || i.tm.base_opcode == 0xfbe - || i.tm.base_opcode == 0xfbf)) + || i.tm.base_opcode == 0xfbf + || i.tm.base_opcode == 0x660f3a14 + || i.tm.base_opcode == 0x660f3a20)) continue; /* crc32 doesn't generate this warning. */ |