RISC-V: Add pause hint instruction.

Add support for the pause hint instruction, as specified in the
Zihintpause extension.  The pause instruction is encoded as a
special form of a memory fence (which is available as part of the
base instruction set).  The chosen encoding does not mandate any
particular memory ordering and therefore is a true hint.

bfd/
    * elfxx-riscv.c (riscv_std_z_ext_strtab): Added zihintpause.
gas/
    * config/tc-riscv.c (riscv_multi_subset_supports): Added
    INSN_CLASS_ZIHINTPAUSE.
    * testsuite/gas/riscv/pause.d: New testcase.  Adding coverage for
    the pause hint instruction.
    * testsuite/gas/riscv/pause.s: Likewise.
include/
    * opcode/riscv-opc.h: Added MATCH_PAUSE, MASK_PAUSE and DECLARE_INSN
    for pause hint instruction.
    * opcode/riscv.h (enum riscv_insn_class): Added INSN_CLASS_ZIHINTPAUSE.
opcodes/
    * riscv-opc.c (riscv_opcodes): Add pause hint instruction.

1 files changed, 2 insertions, 0 deletions

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 052199e..8dc84cb 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -250,6 +250,8 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class)
       return riscv_subset_supports ("zicsr");
     case INSN_CLASS_ZIFENCEI:
       return riscv_subset_supports ("zifencei");
+    case INSN_CLASS_ZIHINTPAUSE:
+      return riscv_subset_supports ("zihintpause");
 
     case INSN_CLASS_ZBA:
       return riscv_subset_supports ("zba");