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author | Jim Wilson <jimw@sifive.com> | 2018-12-10 16:40:46 -0800 |
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committer | Jim Wilson <jimw@sifive.com> | 2018-12-10 16:40:46 -0800 |
commit | 8970c0224e3c36c565672089e38de42765e87f47 (patch) | |
tree | 99c04031e54573f4e98ec30223c02ca543b393a7 /gas/config | |
parent | 5136770380a3a829463d5ef29fa8339d386db51c (diff) | |
download | binutils-8970c0224e3c36c565672089e38de42765e87f47.zip binutils-8970c0224e3c36c565672089e38de42765e87f47.tar.gz binutils-8970c0224e3c36c565672089e38de42765e87f47.tar.bz2 |
RISC-V: Don't segfault for two regs in auipc or lui.
gas/
PR gas/23954
* config/tc-riscv.c (my_getSmallExpression): Expand comment for
register support. Set expr_end if parse a register.
(riscv_ip) <'u'>: Break if imm_expr is not a symbol or constant.
* testsuite/gas/riscv/auipc-parsing.d: New.
* testsuite/gas/riscv/auipc-parsing.l: New.
* testsuite/gas/riscv/auipc-parsing.s: New.
Diffstat (limited to 'gas/config')
-rw-r--r-- | gas/config/tc-riscv.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 9e2035b..f164134 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -1263,11 +1263,15 @@ my_getSmallExpression (expressionS *ep, bfd_reloc_code_real_type *reloc, unsigned crux_depth, str_depth, regno; char *crux; - /* First, check for integer registers. */ + /* First, check for integer registers. No callers can accept a reg, but + we need to avoid accidentally creating a useless undefined symbol below, + if this is an instruction pattern that can't match. A glibc build fails + if this is removed. */ if (reg_lookup (&str, RCLASS_GPR, ®no)) { ep->X_op = O_register; ep->X_add_number = regno; + expr_end = str; return 0; } @@ -1940,6 +1944,9 @@ branch: *imm_reloc = BFD_RELOC_RISCV_HI20; imm_expr->X_add_number <<= RISCV_IMM_BITS; } + /* The 'u' format specifier must be a symbol or a constant. */ + if (imm_expr->X_op != O_symbol && imm_expr->X_op != O_constant) + break; s = expr_end; continue; |