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author | Jan Beulich <jbeulich@novell.com> | 2017-11-13 12:20:30 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2017-11-13 12:20:30 +0100 |
commit | 1187cf29b1f77b4d806c3bbe1fcd86fc7387eeb9 (patch) | |
tree | 97b0a0f667d613adaa484b51bc6e3a20b00b34d7 /gas/config | |
parent | 2abc2bec4d8c241c1cd3972b64162407128b4daf (diff) | |
download | binutils-1187cf29b1f77b4d806c3bbe1fcd86fc7387eeb9.zip binutils-1187cf29b1f77b4d806c3bbe1fcd86fc7387eeb9.tar.gz binutils-1187cf29b1f77b4d806c3bbe1fcd86fc7387eeb9.tar.bz2 |
x86/Intel: don't mistake riz/eiz as base register
Just like we make rsp/esp a base register even if it comes second, make
riz/eiz an index register even if it comes first.
Diffstat (limited to 'gas/config')
-rw-r--r-- | gas/config/tc-i386-intel.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/gas/config/tc-i386-intel.c b/gas/config/tc-i386-intel.c index 36ae818..b8874e4 100644 --- a/gas/config/tc-i386-intel.c +++ b/gas/config/tc-i386-intel.c @@ -288,7 +288,9 @@ i386_intel_simplify_register (expressionS *e) else if (!intel_state.index && (i386_regtab[reg_num].reg_type.bitfield.regxmm || i386_regtab[reg_num].reg_type.bitfield.regymm - || i386_regtab[reg_num].reg_type.bitfield.regzmm)) + || i386_regtab[reg_num].reg_type.bitfield.regzmm + || i386_regtab[reg_num].reg_num == RegRiz + || i386_regtab[reg_num].reg_num == RegEiz)) intel_state.index = i386_regtab + reg_num; else if (!intel_state.base && !intel_state.in_scale) intel_state.base = i386_regtab + reg_num; |