MIPS/GAS: Don't convert PC-relative REL relocs against absolute symbols

Don't convert PC-relative REL relocations against absolute symbols to
section-relative references and retain the original symbol reference
instead.  Offsets into the absolute section may overflow the limited
range of their in-place addend field, causing an assembly error, e.g.:

$ cat test.s
	.text
	.globl	foo
	.ent	foo
foo:
	b	bar
	.end	foo

	.set	bar, 0x12345678
$ as -EB -32 -o test.o test.s
test.s: Assembler messages:
test.s:3: Error: relocation overflow
$

With the original reference retained the source can now be assembled and
linked successfully:

$ as -EB -32 -o test.o test.s
$ objdump -dr test.o

test.o:     file format elf32-tradbigmips

Disassembly of section .text:

00000000 <foo>:
   0:	1000ffff 	b	0 <foo>
			0: R_MIPS_PC16	bar
   4:	00000000 	nop
	...
$ ld -melf32btsmip -Ttext 0x12340000 -e foo -o test test.o
$ objdump -dr test

test:     file format elf32-tradbigmips

Disassembly of section .text:

12340000 <foo>:
12340000:	1000159d 	b	12345678 <bar>
12340004:	00000000 	nop
	...
$

For simplicity always retain the original symbol reference, even if it
would indeed fit.

Making TC_FORCE_RELOCATION_ABS separate from TC_FORCE_RELOCATION causes
R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 branch
relocations against absolute symbols to be converted on RELA targets to
section-relative references.  This is an intended effect of this change.
Absolute symbols carry no ISA annotation in their `st_other' field and
their value is not going to change with linker relaxation, so it is safe
to discard the original reference and keep the calculated final symbol
value only in the relocation's addend.

Similarly R6 R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations referring
absolute symbols can be safely converted even on REL targets, as there
the in-place addend of these relocations covers the entire 32-bit
address space so it can hold the calculated final symbol value, and
likewise the value referred won't be affected by any linker relaxation.

Add a set of suitable test cases and enable REL linker tests which now
work and were previously used as dump patterns for RELA tests only.

	gas/
	* config/tc-mips.h (TC_FORCE_RELOCATION_ABS): New macro.
	(mips_force_relocation_abs): New prototype.
	* config/tc-mips.c (mips_force_relocation_abs): New function.
	* testsuite/gas/mips/branch-absolute.d: Adjust dump patterns.
	* testsuite/gas/mips/mips16-branch-absolute.d: Likewise.
	* testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
	* testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
	Likewise.
	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
	Likewise.
	* testsuite/gas/mips/branch-absolute-addend.d: New test.
	* testsuite/gas/mips/mips16-branch-absolute-addend.d: New test.
	* testsuite/gas/mips/micromips-branch-absolute-addend.d: New
	test.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/mips-elf.exp: Run
	`branch-absolute-addend', `mips16-branch-absolute',
	`mips16-branch-absolute-addend' and
	`micromips-branch-absolute-addend'.

1 files changed, 3 insertions, 0 deletions

diff --git a/gas/config/tc-mips.h b/gas/config/tc-mips.h
index 45e779d..b472673 100644
--- a/gas/config/tc-mips.h
+++ b/gas/config/tc-mips.h
@@ -142,6 +142,9 @@ extern int mips_force_relocation (struct fix *);
 #define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \
   (! SEG_NORMAL (SEG) || mips_force_relocation (FIX))
 
+#define TC_FORCE_RELOCATION_ABS(FIX) mips_force_relocation_abs (FIX)
+extern bfd_boolean mips_force_relocation_abs (struct fix *);
+
 /* Register mask variables.  These are set by the MIPS assembly code
    and used by ECOFF and possibly other object file formats.  */
 extern unsigned long mips_gprmask;