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author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-05-16 14:05:38 +0100 |
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committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-05-16 16:37:24 +0100 |
commit | aef6d006581cab8a858e7abd36c57e73ea6e97a2 (patch) | |
tree | b6924835bc2e675ee030a6a5d2235d0075e1b4fa /cpu | |
parent | 04d54ace12e77deb8b1d26541de0f2cbc11880f5 (diff) | |
download | binutils-aef6d006581cab8a858e7abd36c57e73ea6e97a2.zip binutils-aef6d006581cab8a858e7abd36c57e73ea6e97a2.tar.gz binutils-aef6d006581cab8a858e7abd36c57e73ea6e97a2.tar.bz2 |
[PATCH 42/57][Arm][OBJDUMP] Add support for MVE instructions: vldr[bhw] and vstr[bhw]
opcodes/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
Michael Collison <michael.collison@arm.com>
* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_undefined): Add new reasons.
(insns): Add new instructions.
(is_mve_encoding_conflict):
(print_mve_vld_str_addr): New print function.
(is_mve_undefined): Handle new instructions.
(is_mve_unpredictable): Likewise.
(print_mve_undefined): Likewise.
(print_mve_size): Likewise.
(print_insn_coprocessor_1): Handle MVE VLDR, VSTR instructions.
(print_insn_mve): Handle new operands.
Diffstat (limited to 'cpu')
0 files changed, 0 insertions, 0 deletions