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authorMaciej W. Rozycki <macro@imgtec.com>2017-04-25 11:44:29 +0100
committerMaciej W. Rozycki <macro@imgtec.com>2017-04-25 11:55:34 +0100
commit6e3d1f0728d980a384c5aa63ce7f2ff3919c5024 (patch)
tree131f83b92152d6710c91c9112b8cc07252438c58 /binutils/testsuite/binutils-all/mips/mips16-alias.d
parentadc1273cb27286452ed8b32c5ca3ea263b4854f0 (diff)
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MIPS16/opcodes: Annotate instruction aliases
Complement commit 986e18a5a9fd ("Add a second 'pinfo' member to mips_opcode to extend number of available bits"), <https://sourceware.org/ml/binutils/2005-01/msg00261.html>, and annotate MIPS16 NOP, LA, DLA and the synthetic forms of LD and LW instructions as aliases. These correspond to MOVE, and the PC-relative ADDIU, DADDIU, LD and LW hardware instructions respectively. binutils/ * testsuite/binutils-all/mips/mips16-alias.d: New test. * testsuite/binutils-all/mips/mips16-noalias.d: New test. * testsuite/binutils-all/mips/mips16-alias.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new tests. opcodes/ * mips16-opc.c (AL): New macro. (mips16_opcodes): Mark "nop", "la", "dla", and synthetic forms of "ld" and "lw" as aliases.
Diffstat (limited to 'binutils/testsuite/binutils-all/mips/mips16-alias.d')
-rw-r--r--binutils/testsuite/binutils-all/mips/mips16-alias.d15
1 files changed, 15 insertions, 0 deletions
diff --git a/binutils/testsuite/binutils-all/mips/mips16-alias.d b/binutils/testsuite/binutils-all/mips/mips16-alias.d
new file mode 100644
index 0000000..875615b
--- /dev/null
+++ b/binutils/testsuite/binutils-all/mips/mips16-alias.d
@@ -0,0 +1,15 @@
+#PROG: objcopy
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS16 instruction alias disassembly
+#as: -32 -mips3
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> 0a08 la v0,00000020 <bar>
+[0-9a-f]+ <[^>]*> b207 lw v0,00000020 <bar>
+[0-9a-f]+ <[^>]*> fe47 dla v0,00000020 <bar>
+[0-9a-f]+ <[^>]*> fc43 ld v0,00000020 <bar>
+ \.\.\.
+ \.\.\.