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author | Jan Beulich <jbeulich@suse.com> | 2019-12-11 09:42:29 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2019-12-11 09:42:29 +0100 |
commit | 569d50f1c611690d9ab4fa25eadf0ed565bf7e76 (patch) | |
tree | 51704f4fb691317ad889281391cd9ccf5eda869d /bfd/elf32-arm.c | |
parent | d8edc8b768f0f611088161161392e1075134d635 (diff) | |
download | binutils-569d50f1c611690d9ab4fa25eadf0ed565bf7e76.zip binutils-569d50f1c611690d9ab4fa25eadf0ed565bf7e76.tar.gz binutils-569d50f1c611690d9ab4fa25eadf0ed565bf7e76.tar.bz2 |
x86: further refine SSE check (SSE4a, SHA, GFNI)
In ("x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns") I went
both a little too far and not quite far enough:
- GFNI insns also have AVX512 variants, which also shouldn't get
diagnosed,
- SSE4a insns should get diagnosed just like SSE4.x ones,
- SHA insns should get diagnosed just like PCLMULQDQ or AES ones.
Diffstat (limited to 'bfd/elf32-arm.c')
0 files changed, 0 insertions, 0 deletions